Added GPIO and muxed RGMII1

diff --git a/src/spec/ls2.py b/src/spec/ls2.py
index 1811092dc93e736299480e8f5df145de2ebdece0..24ba4103673d46464ff87f49d41aabbb65ed876d 100644 (file)
--- a/src/spec/ls2.py
+++ b/src/spec/ls2.py
@@ -103,12 +103,14 @@ def pinspec():
     ps.eint("", ('E', 28), 2, 0, 2)
     ps.sys("", ('E', 31), 0, 5, 1) # analog VCO out in right top
 
-    ps.rgmii("0", ('N', 0), 0, 0, 4)
+    ps.gpio("", ('N', 0), 0, 0, 4) # GPIO 0-3
+    ps.rgmii("0", ('N', 0), 1, 0, 4) # RXD0-3
     ps.vss("E", ('N', 4), 0, 6, 1)
     ps.vdd("E", ('N', 5), 0, 6, 1)
     ps.vdd("I", ('N', 6), 0, 6, 1)
     ps.vss("I", ('N', 7), 0, 6, 1)
-    ps.rgmii("0", ('N', 8), 0, 4, 14)
+    ps.gpio("", ('N', 0), 0, 4, 14) # GPIO 4-17
+    ps.rgmii("0", ('N', 8), 1, 4, 14) # more RGMII-1
     #ps.pwm("", ('N', 2), 0, 0, 2)  comment out (litex problem 25mar2021)
     #ps.mspi("1", ('N', 7), 0)       comment out (litex problem 25mar2021)
     #ps.sdmmc("0", ('N', 11), 0)     # comment out (litex problem 25mar2021)