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hmmm experimenting with gpio directions
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sat, 13 Nov 2021 20:01:47 +0000
(20:01 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sat, 13 Nov 2021 20:01:47 +0000
(20:01 +0000)
src/spec/testing_stage1.py
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diff --git
a/src/spec/testing_stage1.py
b/src/spec/testing_stage1.py
index 7de2ef23d971ef0ca80ba60c12b6c9d592ce08c4..c62a249bf37f2e66d5d1aca870b91df3caa848f0 100644
(file)
--- a/
src/spec/testing_stage1.py
+++ b/
src/spec/testing_stage1.py
@@
-52,13
+52,16
@@
def create_resources(pinset):
ios = []
for pin in pins:
pname = "gpio"+pin[:-1] # strip "*" on end
ios = []
for pin in pins:
pname = "gpio"+pin[:-1] # strip "*" on end
- ios.append(Subsignal(pname, Pins(pname, assert_width=1)))
+ ios.append(Subsignal(pname, Pins(pname, dir="io",
+ assert_width=1)))
resources.append(Resource.family(periph, 0, default_name="gpio",
ios=ios))
# add clock and reset
resources.append(Resource.family(periph, 0, default_name="gpio",
ios=ios))
# add clock and reset
- resources.append(Resource("clk", 0, Pins("sys_clk", dir="i")))
- resources.append(Resource("rst", 0, Pins("sys_rst", dir="i")))
+ clk = Resource("clk", 0, Pins("sys_clk", dir="i"))
+ rst = Resource("rst", 0, Pins("sys_rst", dir="i"))
+ resources.append(clk)
+ resources.append(rst)
return resources
return resources
@@
-91,6
+94,8
@@
class Blinker(Elaboratable):
# get the GPIO bank, mess about with some of the pins
m.d.comb += gpio.gpio0.o.eq(1)
m.d.comb += gpio.gpio1.o.eq(gpio.gpio2.i)
# get the GPIO bank, mess about with some of the pins
m.d.comb += gpio.gpio0.o.eq(1)
m.d.comb += gpio.gpio1.o.eq(gpio.gpio2.i)
+ m.d.comb += gpio.gpio1.oe.eq(count[4])
+ m.d.sync += count[0].eq(gpio.gpio1.i)
# get the UART resource, mess with the output tx
uart = platform.request("uart", 0)
print (uart, uart.fields)
# get the UART resource, mess with the output tx
uart = platform.request("uart", 0)
print (uart, uart.fields)