- ps.vdd("E", ('W', 0), 0, 0, 1)
- ps.vss("E", ('W', 1), 0, 0, 1)
- ps.vdd("I", ('W', 2), 0, 0, 1)
- ps.vss("I", ('W', 3), 0, 0, 1)
- ps.mi2c("", ('W', 4), 0, 0, 2)
- ps.sdram1("", ('W', 6), 0, 0, 15) # SDRAM DAM0, D0-7, AD0-3
- ps.vss("I", ('W', 22), 0, 1, 1)
- ps.vdd("I", ('W', 23), 0, 1, 1)
- ps.vss("E", ('W', 24), 0, 1, 1)
- ps.vdd("E", ('W', 25), 0, 1, 1)
- ps.sdram1("", ('W', 26), 0, 15, 6) # AD4-9
+ ps.sdram1("", ('W', 0), 0, 15, 6, rev=True) # AD4-9, turned round
+ ps.vdd("E", ('W', 6), 0, 0, 1)
+ ps.vss("E", ('W', 7), 0, 0, 1)
+ ps.vdd("I", ('W', 8), 0, 0, 1)
+ ps.vss("I", ('W', 9), 0, 0, 1)
+ ps.mi2c("", ('W', 10), 0, 0, 2)
+ ps.sdram1("", ('W', 12), 0, 0, 15) # SDRAM DAM0, D0-7, AD0-3
+ ps.vss("I", ('W', 28), 0, 1, 1)
+ ps.vdd("I", ('W', 29), 0, 1, 1)
+ ps.vss("E", ('W', 30), 0, 1, 1)
+ ps.vdd("E", ('W', 31), 0, 1, 1)