add rgbttl interface

diff --git a/src/bsv/peripheral_gen/rgbttl.py b/src/bsv/peripheral_gen/rgbttl.py
new file mode 100644 (file)
index 0000000..ccc14ea
--- /dev/null
+++ b/src/bsv/peripheral_gen/rgbttl.py
@@ -0,0 +1,22 @@
+from bsv.peripheral_gen.base import PBase
+
+class rgbttl(PBase):
+
+    def slowimport(self):
+        return "    import rgbttl_dummy              :: *;"
+
+    def slowifdecl(self):
+        return "            interface RGBTTL_out lcd{0}_out;"
+
+    def num_axi_regs32(self):
+        return 10
+
+    def mkslow_peripheral(self):
+        sz = len(self.peripheral.pinspecs) - 4 # subtract CK, DE, HS, VS
+        return "        Ifc_rgbttl_dummy lcd{0} <-  mkrgbttl_dummy(%d);" % sz
+
+    def _mk_connection(self, name=None, count=0):
+        return "lcd{0}.slave"
+
+    def pinname_out(self, pname):
+        return pname

diff --git a/src/spec/minitest.py b/src/spec/minitest.py
index fb3901fdd7ad594a9db5b7f4275e7e61921c61cf..3d3f86a38c038e25e7b3282d57438bffc893ef3a 100644 (file)
--- a/src/spec/minitest.py
+++ b/src/spec/minitest.py
@@ -61,7 +61,7 @@ def pinspec():
 
     # Bank A, 0-27
     ps.gpio("", ('A', 0), 0, 0, 28)
-    ps.rgbttl("", ('A', 0), 1, limit=23)
+    ps.rgbttl("", ('A', 0), 1, limit=22)
     ps.spi("0", ('A', 10), 2)
     ps.quadspi("", ('A', 4), 2)
     ps.uart("0", ('A', 16), 2)