-# TODO: move to suitable location
-class Pins:
- """declare a list of pins, including name and direction. grouped by fn
- the pin dictionary needs to be in a reliable order so that the JTAG
- Boundary Scan is also in a reliable order
- """
- def __init__(self, pindict=None):
- if pindict is None:
- pindict = {}
- self.io_names = OrderedDict()
- if isinstance(pindict, OrderedDict):
- self.io_names.update(pindict)
- else:
- keys = list(pindict.keys())
- keys.sort()
- for k in keys:
- self.io_names[k] = pindict[k]
+class ManPinmux(Elaboratable):
+ def __init__(self):
+ print("Test Manual Pinmux!")
+ self.n_banks = 2
+ self.iomux1 = IOMuxBlockSingle(self.n_banks)
+ self.iomux2 = IOMuxBlockSingle(self.n_banks)
+ self.pad1 = Record(name="Pad1", layout=io_layout)
+ self.pad2 = Record(name="Pad2", layout=io_layout)
+ self.uart = Record(name="uart", layout=uart_layout)
+ self.i2c = {"sda": Record(name="sda", layout=io_layout),
+ "scl": Record(name="scl", layout=io_layout)
+ }
+ self.bank = Signal(log2_int(self.n_banks))
+
+ def elaborate(self, platform):
+ m = Module()
+ comb, sync = m.d.comb, m.d.sync
+ iomux1 = self.iomux1
+ iomux2 = self.iomux2
+ m.submodules.iomux1 = iomux1
+ m.submodules.iomux2 = iomux2
+
+ pad1 = self.pad1
+ pad2 = self.pad2
+ uart = self.uart
+ i2c = self.i2c
+ bank = self.bank
+
+ comb += iomux1.bank.eq(bank)
+ comb += iomux2.bank.eq(bank)
+
+ # uart connected to bank 0 - Pad 1 tx, Pad 2 rx
+ comb += iomux1.bank_ports[UART_BANK].o.eq(uart.tx)
+ comb += iomux1.bank_ports[UART_BANK].oe.eq(uart.oe)
+ comb += uart.rx.eq(iomux2.bank_ports[UART_BANK].i)
+ # i2c connected to bank 1 - Pad 1 sda, Pad 2 scl
+ comb += iomux1.bank_ports[I2C_BANK].o.eq(i2c["sda"].o)
+ comb += iomux1.bank_ports[I2C_BANK].oe.eq(i2c["sda"].oe)
+ comb += i2c["sda"].i.eq(iomux1.bank_ports[I2C_BANK].i)
+ comb += iomux2.bank_ports[I2C_BANK].o.eq(i2c["scl"].o)
+ comb += iomux2.bank_ports[I2C_BANK].oe.eq(i2c["scl"].oe)
+ comb += i2c["scl"].i.eq(iomux2.bank_ports[I2C_BANK].i)
+
+ comb += pad1.o.eq(iomux1.out_port.o)
+ comb += pad1.oe.eq(iomux1.out_port.oe)
+ comb += iomux1.out_port.i.eq(pad1.i)
+ comb += pad2.o.eq(iomux2.out_port.o)
+ comb += pad2.oe.eq(iomux2.out_port.oe)
+ comb += iomux2.out_port.i.eq(pad2.i)
+
+ return m