git.libre-soc.org Git - riscv-isa-sim.git/commit

author	Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
	Wed, 19 Jan 2011 01:51:52 +0000 (17:51 -0800)
committer	Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
	Wed, 19 Jan 2011 01:51:52 +0000 (17:51 -0800)
commit	21ce327f5d60d6805b5d9328b68f7ad2c261a859
tree	22ee7ac3dfb4d00662ff6f0d1f057481efc67772	tree
parent	5ddec097b858aafe783eb3aff551d00e9c8c8a37	commit \| diff

[opcodes, sim, xcc] made *w insns illegal in RV32

now generic variants behave differently in RV32 and RV64.

59 files changed:

riscv/decode.h		diff \| blob \| history
riscv/execute.h		diff \| blob \| history
riscv/insns/add.h		diff \| blob \| history
riscv/insns/addi.h		diff \| blob \| history
riscv/insns/addiw.h		diff \| blob \| history
riscv/insns/addw.h		diff \| blob \| history
riscv/insns/amo_add.h		diff \| blob \| history
riscv/insns/amo_and.h		diff \| blob \| history
riscv/insns/amo_max.h		diff \| blob \| history
riscv/insns/amo_maxu.h		diff \| blob \| history
riscv/insns/amo_min.h		diff \| blob \| history
riscv/insns/amo_minu.h		diff \| blob \| history
riscv/insns/amo_or.h		diff \| blob \| history
riscv/insns/amo_swap.h		diff \| blob \| history
riscv/insns/cvt_d_l.h		diff \| blob \| history
riscv/insns/cvt_l_d.h		diff \| blob \| history
riscv/insns/cvt_l_s.h		diff \| blob \| history
riscv/insns/cvt_s_l.h		diff \| blob \| history
riscv/insns/cvtu_d_l.h		diff \| blob \| history
riscv/insns/cvtu_l_d.h		diff \| blob \| history
riscv/insns/cvtu_l_s.h		diff \| blob \| history
riscv/insns/cvtu_s_l.h		diff \| blob \| history
riscv/insns/div.h		diff \| blob \| history
riscv/insns/divu.h		diff \| blob \| history
riscv/insns/divuw.h		diff \| blob \| history
riscv/insns/divw.h		diff \| blob \| history
riscv/insns/ld.h		diff \| blob \| history
riscv/insns/mfcr.h		diff \| blob \| history
riscv/insns/mff_d.h		diff \| blob \| history
riscv/insns/mfpcr.h		diff \| blob \| history
riscv/insns/mtf_d.h		diff \| blob \| history
riscv/insns/mul.h		diff \| blob \| history
riscv/insns/mulh.h		diff \| blob \| history
riscv/insns/mulhu.h		diff \| blob \| history
riscv/insns/mulhuw.h	[deleted file]	blob \| history
riscv/insns/mulhw.h	[deleted file]	blob \| history
riscv/insns/mulw.h		diff \| blob \| history
riscv/insns/rem.h		diff \| blob \| history
riscv/insns/remu.h		diff \| blob \| history
riscv/insns/remuw.h		diff \| blob \| history
riscv/insns/remw.h		diff \| blob \| history
riscv/insns/sd.h		diff \| blob \| history
riscv/insns/sll.h		diff \| blob \| history
riscv/insns/slli.h		diff \| blob \| history
riscv/insns/slliw.h		diff \| blob \| history
riscv/insns/sllw.h		diff \| blob \| history
riscv/insns/sra.h		diff \| blob \| history
riscv/insns/srai.h		diff \| blob \| history
riscv/insns/sraiw.h		diff \| blob \| history
riscv/insns/sraw.h		diff \| blob \| history
riscv/insns/srl.h		diff \| blob \| history
riscv/insns/srli.h		diff \| blob \| history
riscv/insns/srliw.h		diff \| blob \| history
riscv/insns/srlw.h		diff \| blob \| history
riscv/insns/sub.h		diff \| blob \| history
riscv/insns/subw.h		diff \| blob \| history
riscv/processor.cc		diff \| blob \| history
riscv/processor.h		diff \| blob \| history
riscv/sim.cc		diff \| blob \| history

Simple-V augmented version of spike

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