projects / riscv-isa-sim.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: e2c0c30) | patch
Added PC histogram option.
authorChristopher Celio <celio@eecs.berkeley.edu>
Fri, 15 Aug 2014 22:38:41 +0000 (15:38 -0700)
committerChristopher Celio <celio@eecs.berkeley.edu>
Fri, 15 Aug 2014 22:38:41 +0000 (15:38 -0700)
commit616cc32c30ac0684edfd50ed44fc78ed1bc20884
tree3ad9cbea79da5a40a5a351e842e1e890a07ad298tree
parente2c0c3021ac2fa7cad5866e0f100c2dbf2372986commit | diff
Added PC histogram option.

  - Spits out all PCs (on 4B granularity) executed with count.
  - Requires a compile time configuration option.
  - Also requires a run-time flag.
config.h.in diff | blob | history
configure diff | blob | history
riscv/processor.cc diff | blob | history
riscv/processor.h diff | blob | history
riscv/riscv.ac diff | blob | history
riscv/sim.cc diff | blob | history
riscv/sim.h diff | blob | history
spike/spike.cc diff | blob | history
Simple-V augmented version of spike