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(parent: 0bd33ed) | patch
Rename tdata[0-2] to tdata[1-3].
authorTim Newsome <tim@sifive.com>
Wed, 31 Aug 2016 22:51:58 +0000 (15:51 -0700)
committerTim Newsome <tim@sifive.com>
Wed, 31 Aug 2016 22:51:58 +0000 (15:51 -0700)
commit84f5c416bffb66c8b47fd94b90afa888af7e819e
tree3af886d265e79c7271b0a70e0edffdfbf4813f87tree
parent0bd33edd801b71d009642cb2bcbd8636f97b6aaacommit | diff
Rename tdata[0-2] to tdata[1-3].

Add timing bit (but it doesn't do anything).
Implement dmode bit.
riscv/processor.cc diff | blob | history
riscv/processor.h diff | blob | history
Simple-V augmented version of spike