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(parent: c0cd05e) | patch
[xcc,sim,opcodes] added more RVC instructions
authorAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Sun, 24 Apr 2011 23:35:13 +0000 (16:35 -0700)
committerAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Sun, 24 Apr 2011 23:35:13 +0000 (16:35 -0700)
commitd5518cd4d9804498204ce8e79ac04870f383966e
tree6a06d9c8e7bb805d16effd6b56d8343bb2018a4ctree
parentc0cd05e70b496598033134acd5e038502d3763f0commit | diff
[xcc,sim,opcodes] added more RVC instructions
22 files changed:
riscv/decode.h diff | blob | history
riscv/execute.h diff | blob | history
riscv/insns/c_add.h [new file with mode: 0644] blob
riscv/insns/c_add3.h [new file with mode: 0644] blob
riscv/insns/c_addi.h diff | blob | history
riscv/insns/c_and3.h [new file with mode: 0644] blob
riscv/insns/c_fld.h [new file with mode: 0644] blob
riscv/insns/c_flw.h [new file with mode: 0644] blob
riscv/insns/c_fsd.h [new file with mode: 0644] blob
riscv/insns/c_fsw.h [new file with mode: 0644] blob
riscv/insns/c_ld0.h [new file with mode: 0644] blob
riscv/insns/c_lw0.h [new file with mode: 0644] blob
riscv/insns/c_or3.h [new file with mode: 0644] blob
riscv/insns/c_slli.h [new file with mode: 0644] blob
riscv/insns/c_slli32.h [new file with mode: 0644] blob
riscv/insns/c_slliw.h [new file with mode: 0644] blob
riscv/insns/c_srai.h [new file with mode: 0644] blob
riscv/insns/c_srai32.h [new file with mode: 0644] blob
riscv/insns/c_srli.h [new file with mode: 0644] blob
riscv/insns/c_srli32.h [new file with mode: 0644] blob
riscv/insns/c_sub.h [new file with mode: 0644] blob
riscv/insns/c_sub3.h [new file with mode: 0644] blob
Simple-V augmented version of spike