Prohibit relaxing the initial gp generation
[riscv-tests.git] / debug / programs / entry.S
1 #ifndef ENTRY_S
2 #define ENTRY_S
3
4 #include "encoding.h"
5
6 #define STACK_SIZE 512
7
8 #if XLEN == 64
9 # define LREG ld
10 # define SREG sd
11 # define REGBYTES 8
12 #else
13 # define LREG lw
14 # define SREG sw
15 # define REGBYTES 4
16 #endif
17
18 .section .text.entry
19 .globl _start
20 _start:
21 j handle_reset
22
23 nmi_vector:
24 j nmi_vector
25
26 trap_vector:
27 j trap_entry
28
29 handle_reset:
30 la t0, trap_entry
31 csrw mtvec, t0
32 csrwi mstatus, 0
33 csrwi mideleg, 0
34 csrwi medeleg, 0
35 csrwi mie, 0
36
37 # initialize global pointer
38 .option push
39 .option norelax
40 la gp, __global_pointer$
41 .option pop
42
43 # initialize stack pointer
44 la sp, stack_top
45
46 # Clear all hardware triggers
47 li t0, ~0
48 1:
49 addi t0, t0, 1
50 csrw CSR_TSELECT, t0
51 csrw CSR_TDATA1, zero
52 csrr t1, CSR_TSELECT
53 beq t0, t1, 1b
54
55 # perform the rest of initialization in C
56 j _init
57
58
59 trap_entry:
60 addi sp, sp, -32*REGBYTES
61
62 SREG x1, 1*REGBYTES(sp)
63 SREG x2, 2*REGBYTES(sp)
64 SREG x3, 3*REGBYTES(sp)
65 SREG x4, 4*REGBYTES(sp)
66 SREG x5, 5*REGBYTES(sp)
67 SREG x6, 6*REGBYTES(sp)
68 SREG x7, 7*REGBYTES(sp)
69 SREG x8, 8*REGBYTES(sp)
70 SREG x9, 9*REGBYTES(sp)
71 SREG x10, 10*REGBYTES(sp)
72 SREG x11, 11*REGBYTES(sp)
73 SREG x12, 12*REGBYTES(sp)
74 SREG x13, 13*REGBYTES(sp)
75 SREG x14, 14*REGBYTES(sp)
76 SREG x15, 15*REGBYTES(sp)
77 SREG x16, 16*REGBYTES(sp)
78 SREG x17, 17*REGBYTES(sp)
79 SREG x18, 18*REGBYTES(sp)
80 SREG x19, 19*REGBYTES(sp)
81 SREG x20, 20*REGBYTES(sp)
82 SREG x21, 21*REGBYTES(sp)
83 SREG x22, 22*REGBYTES(sp)
84 SREG x23, 23*REGBYTES(sp)
85 SREG x24, 24*REGBYTES(sp)
86 SREG x25, 25*REGBYTES(sp)
87 SREG x26, 26*REGBYTES(sp)
88 SREG x27, 27*REGBYTES(sp)
89 SREG x28, 28*REGBYTES(sp)
90 SREG x29, 29*REGBYTES(sp)
91 SREG x30, 30*REGBYTES(sp)
92 SREG x31, 31*REGBYTES(sp)
93
94 csrr a0, mcause
95 csrr a1, mepc
96 mv a2, sp
97 jal handle_trap
98 csrw mepc, a0
99
100 # Remain in M-mode after mret
101 li t0, MSTATUS_MPP
102 csrs mstatus, t0
103
104 LREG x1, 1*REGBYTES(sp)
105 LREG x2, 2*REGBYTES(sp)
106 LREG x3, 3*REGBYTES(sp)
107 LREG x4, 4*REGBYTES(sp)
108 LREG x5, 5*REGBYTES(sp)
109 LREG x6, 6*REGBYTES(sp)
110 LREG x7, 7*REGBYTES(sp)
111 LREG x8, 8*REGBYTES(sp)
112 LREG x9, 9*REGBYTES(sp)
113 LREG x10, 10*REGBYTES(sp)
114 LREG x11, 11*REGBYTES(sp)
115 LREG x12, 12*REGBYTES(sp)
116 LREG x13, 13*REGBYTES(sp)
117 LREG x14, 14*REGBYTES(sp)
118 LREG x15, 15*REGBYTES(sp)
119 LREG x16, 16*REGBYTES(sp)
120 LREG x17, 17*REGBYTES(sp)
121 LREG x18, 18*REGBYTES(sp)
122 LREG x19, 19*REGBYTES(sp)
123 LREG x20, 20*REGBYTES(sp)
124 LREG x21, 21*REGBYTES(sp)
125 LREG x22, 22*REGBYTES(sp)
126 LREG x23, 23*REGBYTES(sp)
127 LREG x24, 24*REGBYTES(sp)
128 LREG x25, 25*REGBYTES(sp)
129 LREG x26, 26*REGBYTES(sp)
130 LREG x27, 27*REGBYTES(sp)
131 LREG x28, 28*REGBYTES(sp)
132 LREG x29, 29*REGBYTES(sp)
133 LREG x30, 30*REGBYTES(sp)
134 LREG x31, 31*REGBYTES(sp)
135
136 addi sp, sp, 32*REGBYTES
137 mret
138
139 // Fill the stack with data so we can see if it was overrun.
140 .align 4
141 stack_bottom:
142 .fill STACK_SIZE/4, 4, 0x22446688
143 stack_top:
144 #endif