debug/programs/trigger.S

   1 #include "encoding.h"
   2
   3 #if XLEN == 64
   4 # define LREG ld
   5 # define SREG sd
   6 # define REGBYTES 8
   7 #else
   8 # define LREG lw
   9 # define SREG sw
  10 # define REGBYTES 4
  11 #endif
  12
  13         .global         main
  14
  15         .section        .text
  16 main:
  17
  18         la      a0, data
  19         li      t0, 0
  20 just_before_read_loop:
  21         li      t2, 16
  22 read_loop:
  23         lw      t1, 0(a0)
  24         addi    t1, t1, 1
  25         addi    t0, t0, 1
  26 read_again:
  27         lw      t1, 0(a0)
  28         addi    a0, a0, 4
  29         blt     t0, t2, read_loop
  30
  31         la      a0, data
  32 just_before_write_loop:
  33         li      t0, 1
  34 write_loop:
  35         sw      t0, 0(a0)
  36         addi    t0, t0, 1
  37         addi    a0, a0, 4
  38         blt     t0, t2, write_loop
  39
  40         j       main_exit
  41
  42 write_store_trigger:
  43         li      a0, (1<<6) | (1<<1)
  44         li      a1, 0xdeadbee0
  45         jal     write_triggers
  46         la      a0, data
  47         jal     read_triggers
  48
  49 write_load_trigger:
  50         li      a0, (1<<6) | (1<<0)
  51         li      a1, 0xfeedac00
  52         jal     write_triggers
  53         la      a0, data
  54         jal     read_triggers
  55
  56 // Clear triggers so the next test can use them.
  57 clear_triggers:
  58         li      a0, 0
  59         jal     write_triggers
  60
  61 main_exit:
  62         li      a0, 0
  63         j       _exit
  64
  65 write_triggers:
  66         // a0: value to write to each tdata1
  67         // a1: value to write to each tdata2
  68         li      t0, 0
  69 2:
  70         csrw    CSR_TSELECT, t0
  71         csrr    t1, CSR_TSELECT
  72         bne     t0, t1, 1f
  73         addi    t0, t0, 1
  74         csrw    CSR_TDATA2, a1
  75         csrw    CSR_TDATA1, a0
  76         j       2b
  77 1:      ret
  78
  79 read_triggers:
  80         // a0: address where data should be written
  81         li      t0, 0
  82 2:
  83         csrw    CSR_TSELECT, t0
  84         csrr    t1, CSR_TSELECT
  85         bne     t0, t1, 1f
  86         addi    t0, t0, 1
  87         csrr    t1, CSR_TDATA1
  88         SREG    t1, 0(a0)
  89         csrr    t1, CSR_TDATA2
  90         SREG    t1, REGBYTES(a0)
  91         addi    a0, a0, 2*REGBYTES
  92         j       2b
  93 1:      SREG    zero, 0(a0)
  94         ret
  95
  96         .data
  97         .align  3
  98 data:   .word   0x40
  99         .word   0x41
 100         .word   0x42
 101         .word   0x43
 102         .word   0x44
 103         .word   0x45
 104         .word   0x46
 105         .word   0x47
 106         .word   0x48
 107         .word   0x49
 108         .word   0x4a
 109         .word   0x4b
 110         .word   0x4c
 111         .word   0x4d
 112         .word   0x4e
 113         .word   0x4f