env/p/riscv_test.h

   1 #ifndef _ENV_PHYSICAL_SINGLE_CORE_H
   2 #define _ENV_PHYSICAL_SINGLE_CORE_H
   3
   4 #include "../pcr.h"
   5
   6 //-----------------------------------------------------------------------
   7 // Begin Macro
   8 //-----------------------------------------------------------------------
   9
  10 #define RVTEST_RV64U                                                    \
  11   .macro init;                                                          \
  12   .endm
  13
  14 #define RVTEST_RV64UF                                                   \
  15   .macro init;                                                          \
  16   RVTEST_FP_ENABLE;                                                     \
  17   .endm
  18
  19 #define RVTEST_RV64UV                                                   \
  20   .macro init;                                                          \
  21   RVTEST_FP_ENABLE;                                                     \
  22   RVTEST_VEC_ENABLE;                                                    \
  23   .endm
  24
  25 #define RVTEST_RV32U                                                    \
  26   .macro init;                                                          \
  27   RVTEST_32_ENABLE;                                                     \
  28   .endm
  29
  30 #define RVTEST_RV32UF                                                   \
  31   .macro init;                                                          \
  32   RVTEST_32_ENABLE;                                                     \
  33   RVTEST_FP_ENABLE;                                                     \
  34   .endm
  35
  36 #define RVTEST_RV32UV                                                   \
  37   .macro init;                                                          \
  38   RVTEST_32_ENABLE;                                                     \
  39   RVTEST_FP_ENABLE;                                                     \
  40   RVTEST_VEC_ENABLE;                                                    \
  41   .endm
  42
  43 #define RVTEST_RV64S                                                    \
  44   .macro init;                                                          \
  45   .endm
  46
  47 #define RVTEST_32_ENABLE                                                \
  48   clearpcr status, SR_S64                                               \
  49
  50 #define RVTEST_FP_ENABLE                                                \
  51   setpcr status, SR_EF;                                                 \
  52   mfpcr a0, status;                                                     \
  53   and   a0, a0, SR_EF;                                                  \
  54   bnez  a0, 2f;                                                         \
  55   RVTEST_PASS;                                                          \
  56 2:fssr x0;                                                              \
  57
  58 #define RVTEST_VEC_ENABLE                                               \
  59   setpcr status, SR_EV;                                                 \
  60   mfpcr a0, status;                                                     \
  61   and   a0, a0, SR_EV;                                                  \
  62   bnez  a0, 2f;                                                         \
  63   RVTEST_PASS;                                                          \
  64 2:                                                                      \
  65
  66 #define RISCV_MULTICORE_DISABLE                                         \
  67         mfpcr a0, hartid; 1: bnez a0, 1b;                               \
  68
  69 #define EXTRA_INIT
  70
  71 #define RVTEST_CODE_BEGIN                                               \
  72         .text;                                                          \
  73         .align  4;                                                      \
  74         .global _start;                                                 \
  75 _start:                                                                 \
  76         RISCV_MULTICORE_DISABLE;                                        \
  77         init;                                                           \
  78         EXTRA_INIT;                                                     \
  79
  80 //-----------------------------------------------------------------------
  81 // End Macro
  82 //-----------------------------------------------------------------------
  83
  84 #define RVTEST_CODE_END                                                 \
  85
  86 //-----------------------------------------------------------------------
  87 // Pass/Fail Macro
  88 //-----------------------------------------------------------------------
  89
  90 #define RVTEST_PASS                                                     \
  91         fence;                                                          \
  92         li  x1, 1;                                                      \
  93         mtpcr x1, tohost;                                               \
  94 1:      b 1b;                                                           \
  95
  96 #define RVTEST_FAIL                                                     \
  97         fence;                                                          \
  98         beqz x28, 1f;                                                   \
  99         sll x28, x28, 1;                                                \
 100         or x28, x28, 1;                                                 \
 101         mtpcr x28, tohost;                                              \
 102 1:      b 1b;                                                           \
 103
 104 //-----------------------------------------------------------------------
 105 // Data Section Macro
 106 //-----------------------------------------------------------------------
 107
 108 #define RVTEST_DATA_BEGIN EXTRA_DATA
 109 #define RVTEST_DATA_END
 110
 111 #define EXTRA_DATA
 112
 113 //#define RVTEST_DATA_BEGIN .align 4; .global begin_signature; begin_signature:
 114 //#define RVTEST_DATA_END .align 4; .global end_signature; end_signature:
 115
 116 #endif