isa/macros/simplev/sv_test_macros.h

   1 #define SV_REG_CSR( type, regkey, elwidth, regidx, isvec, packed ) \
   2   (regkey | (elwidth<<5) | (type<<7) | (regidx<<8) | (isvec<<14) | (packed<<15))
   3
   4 #define SV_PRED_CSR( type, regkey, zero, inv, regidx, active ) \
   5   (regkey | (zero<<5) | (inv<<6) | (type<<7) | (regidx<<8) | (active<<14))
   6
   7 #define SET_SV_CSR( type, regkey, elwidth, regidx, isvec, packed ) \
   8         li     x1, SV_REG_CSR( type, regkey, elwidth, regidx, isvec, packed ); \
   9         csrrw  x0, 0x4c0, x1
  10
  11 #define CLR_SV_CSRS( ) csrrw   x0, 0x4c0, 0
  12
  13 #define SET_SV_MVL( val ) csrrwi   x0, 0x4f2, val
  14 #define SET_SV_VL( val )  csrrwi   x0, 0x4f0, val
  15
  16 #define SV_LD_DATA( reg, from, offs ) \
  17         la      x1, from; \
  18         lw      reg, offs(x1)
  19
  20 #define TEST_SV_IMM( reg, imm ) \
  21         li      x1, imm; \
  22         bne     reg, x1, fail