isa/macros/simplev/sv_test_macros.h

   1 #define SV_REG_CSR(type, regkey, elwidth, regidx, isvec, packed) \
   2   (regkey | (elwidth<<5) | (type<<7) | (regidx<<8) | (isvec<<14) | (packed<<15))
   3 #define SV_PRED_CSR(type, regkey, zero, inv, regidx, active) \
   4   (regkey | (zero<<5) | (inv<<6) | (type<<7) | (regidx<<8) | (active<<14))