isa/rv64mi/breakpoint.S

   1 # See LICENSE for license details.
   2
   3 #*****************************************************************************
   4 # breakpoint.S
   5 #-----------------------------------------------------------------------------
   6 #
   7 # Test breakpoints, if they are implemented.
   8 #
   9
  10 #include "riscv_test.h"
  11 #include "test_macros.h"
  12
  13 RVTEST_RV64M
  14 RVTEST_CODE_BEGIN
  15
  16   # Set up breakpoint to trap on M-mode fetches.
  17   li TESTNUM, 2
  18   csrw tdrselect, x0
  19   li t0, (BPCONTROL_MATCHCOND & (BPCONTROL_MATCHCOND>>1)) | BPCONTROL_M | BPCONTROL_X
  20   csrw tdrdata1, t0
  21   # Skip if breakpoint type is unsupported.
  22   csrr t1, tdrdata1
  23   bne t0, t1, 2f
  24   la t0, 1f
  25   csrw tdrdata2, t0
  26 1:
  27   # Trap handler should skip this instruction.
  28   j fail
  29
  30   # Make sure reads don't trap.
  31   li TESTNUM, 3
  32   lw t0, (t0)
  33
  34 2:
  35   # Set up breakpoint to trap on M-mode reads.
  36   li TESTNUM, 4
  37   li t0, (BPCONTROL_MATCHCOND & (BPCONTROL_MATCHCOND>>1)) | BPCONTROL_M | BPCONTROL_R
  38   csrw tdrdata1, t0
  39   # Skip if breakpoint type is unsupported.
  40   csrr t1, tdrdata1
  41   bne t0, t1, 2f
  42   la t0, write_data
  43   csrw tdrdata2, t0
  44
  45   # Trap handler should skip this instruction.
  46   lw t0, (t0)
  47   beqz t0, fail
  48
  49   # Make sure writes don't trap.
  50   li TESTNUM, 5
  51   sw x0, (t0)
  52
  53 2:
  54   # Set up breakpoint to trap on M-mode stores.
  55   li TESTNUM, 6
  56   li t0, (BPCONTROL_MATCHCOND & (BPCONTROL_MATCHCOND>>1)) | BPCONTROL_M | BPCONTROL_W
  57   csrw tdrdata1, t0
  58   # Skip if breakpoint type is unsupported.
  59   csrr t1, tdrdata1
  60   bne t0, t1, 2f
  61
  62   # Trap handler should skip this instruction.
  63   la t0, write_data
  64   sw t0, (t0)
  65
  66   # Make sure store didn't succeed.
  67   li TESTNUM, 7
  68   lw t0, (t0)
  69   bnez t0, fail
  70
  71 2:
  72   TEST_PASSFAIL
  73
  74 mtvec_handler:
  75   # Only even-numbered tests should trap.
  76   andi a0, TESTNUM, 1
  77   bnez a0, fail
  78
  79   li a0, CAUSE_BREAKPOINT
  80   csrr a1, mcause
  81   bne a0, a1, fail
  82
  83   csrr a0, mepc
  84   addi a0, a0, 4
  85   csrw mepc, a0
  86   mret
  87
  88 RVTEST_CODE_END
  89
  90   .data
  91 RVTEST_DATA_BEGIN
  92
  93   TEST_DATA
  94
  95 write_data: .word 0
  96
  97 RVTEST_DATA_END