isa/rv64si/csr.S

   1 # See LICENSE for license details.
   2
   3 #*****************************************************************************
   4 # csr.S
   5 #-----------------------------------------------------------------------------
   6 #
   7 # Test CSRRx and CSRRxI instructions.
   8 #
   9
  10 #include "riscv_test.h"
  11 #include "test_macros.h"
  12
  13 RVTEST_RV64S
  14 RVTEST_CODE_BEGIN
  15
  16 #ifdef __MACHINE_MODE
  17   #define sscratch mscratch
  18   #define sstatus mstatus
  19   #define scause mcause
  20   #define sepc mepc
  21   #define sret mret
  22   #define stvec_handler mtvec_handler
  23   #undef SSTATUS_SPP
  24   #define SSTATUS_SPP MSTATUS_MPP
  25 #endif
  26
  27   # For RV64, make sure UXL encodes RV64.  (UXL does not exist for RV32.)
  28 #if __riscv_xlen == 64
  29   # If running in M mode, use mstatus.MPP to check existence of U mode.
  30   # Otherwise, if in S mode, then U mode must exist and we don't need to check.
  31 #ifdef __MACHINE_MODE
  32   li t0, MSTATUS_MPP
  33   csrc mstatus, t0
  34   csrr t1, mstatus
  35   and t0, t0, t1
  36   bnez t0, 1f
  37 #endif
  38   # If U mode is present, UXL should be 2 (XLEN = 64-bit)
  39   TEST_CASE(13, a0, SSTATUS_UXL & (SSTATUS_UXL << 1), csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
  40 #ifdef __MACHINE_MODE
  41   j 2f
  42 1:
  43   # If U mode is not present, UXL should be 0
  44   TEST_CASE(14, a0, 0, csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
  45 2:
  46 #endif
  47 #endif
  48
  49   csrwi sscratch, 3
  50   TEST_CASE( 2, a0,         3, csrr a0, sscratch);
  51   TEST_CASE( 3, a1,         3, csrrci a1, sscratch, 1);
  52   TEST_CASE( 4, a2,         2, csrrsi a2, sscratch, 4);
  53   TEST_CASE( 5, a3,         6, csrrwi a3, sscratch, 2);
  54   TEST_CASE( 6, a1,         2, li a0, 0xbad1dea; csrrw a1, sscratch, a0);
  55   TEST_CASE( 7, a0, 0xbad1dea, li a0, 0x0001dea; csrrc a0, sscratch, a0);
  56   TEST_CASE( 8, a0, 0xbad0000, li a0, 0x000beef; csrrs a0, sscratch, a0);
  57   TEST_CASE( 9, a0, 0xbadbeef, csrr a0, sscratch);
  58
  59 #ifdef __MACHINE_MODE
  60   # Is F extension present?
  61   csrr a0, misa
  62   andi a0, a0, (1 << ('F' - 'A'))
  63   beqz a0, 1f
  64   # If so, make sure FP stores have no effect when mstatus.FS is off.
  65   li a1, MSTATUS_FS
  66   csrs mstatus, a1
  67 #ifdef __riscv_flen
  68   fmv.s.x f0, x0
  69   csrc mstatus, a1
  70   la a1, fsw_data
  71   TEST_CASE(10, a0, 1, fsw f0, (a1); lw a0, (a1));
  72 #else
  73   # Fail if this test is compiled without F but executed on a core with F.
  74   TEST_CASE(10, zero, 1)
  75 #endif
  76 1:
  77
  78   # Figure out if 'U' is set in misa
  79   csrr a0, misa   # a0 = csr(misa)
  80   srli a0, a0, 20 # a0 = a0 >> 20
  81   andi a0, a0, 1  # a0 = a0 & 1
  82   beqz a0, finish # if no user mode, skip the rest of these checks
  83 #endif /* __MACHINE_MODE */
  84
  85   # jump to user land
  86   li t0, SSTATUS_SPP
  87   csrc sstatus, t0
  88   la t0, 1f
  89   csrw sepc, t0
  90   sret
  91   1:
  92
  93   # Make sure writing the cycle counter causes an exception.
  94   # Don't run in supervisor, as we don't delegate illegal instruction traps.
  95 #ifdef __MACHINE_MODE
  96   TEST_CASE(11, a0, 255, li a0, 255; csrrw a0, cycle, x0);
  97 #endif
  98
  99   # Make sure reading status in user mode causes an exception.
 100   # Don't run in supervisor, as we don't delegate illegal instruction traps.
 101 #ifdef __MACHINE_MODE
 102   TEST_CASE(12, a0, 255, li a0, 255; csrr a0, sstatus)
 103 #else
 104   TEST_CASE(12, x0, 0, nop)
 105 #endif
 106
 107 finish:
 108   RVTEST_PASS
 109
 110   # We should only fall through to this if scall failed.
 111   TEST_PASSFAIL
 112
 113   .align 2
 114   .global stvec_handler
 115 stvec_handler:
 116   # Trapping on tests 10-12 is good news.
 117   # Note that since the test didn't complete, TESTNUM is smaller by 1.
 118   li t0, 9
 119   bltu TESTNUM, t0, 1f
 120   li t0, 11
 121   bleu TESTNUM, t0, privileged
 122 1:
 123
 124   # catch RVTEST_PASS and kick it up to M-mode
 125   csrr t0, scause
 126   li t1, CAUSE_USER_ECALL
 127   bne t0, t1, fail
 128   RVTEST_PASS
 129
 130 privileged:
 131   # Make sure scause indicates a lack of privilege.
 132   csrr t0, scause
 133   li t1, CAUSE_ILLEGAL_INSTRUCTION
 134   bne t0, t1, fail
 135   # Return to user mode, but skip the trapping instruction.
 136   csrr t0, sepc
 137   addi t0, t0, 4
 138   csrw sepc, t0
 139   sret
 140
 141 RVTEST_CODE_END
 142
 143   .data
 144 RVTEST_DATA_BEGIN
 145
 146 fsw_data: .word 1
 147
 148 RVTEST_DATA_END