isa/rv64sv/illegal_inst.S

   1 # See LICENSE for license details.
   2
   3 #*****************************************************************************
   4 # illegal_tvec_cmd.S
   5 #-----------------------------------------------------------------------------
   6 #
   7 # Test illegal tvec command trap.
   8 #
   9
  10 #include "riscv_test.h"
  11 #include "test_macros.h"
  12
  13 RVTEST_RV64SV
  14 RVTEST_CODE_BEGIN
  15
  16   .word 0xff00002b
  17
  18   vsetcfg 32,0
  19   li a3,4
  20   vsetvl a3,a3
  21
  22 vtcode1:
  23   lw x2, 0(x1)
  24   stop
  25
  26 vtcode2:
  27   add x2,x2,x3
  28   stop
  29
  30 stvec_handler:
  31   vxcptkill
  32
  33   li TESTNUM,2
  34
  35   # check cause
  36   csrr a3, scause
  37   li a4,HWACHA_CAUSE_ILLEGAL_INSTRUCTION
  38   bne a3,a4,fail
  39
  40   # check vec irq aux
  41   csrr a3, sbadaddr
  42   li a4, 0xff00002b
  43   bne a3,a4,fail
  44
  45   # make sure vector unit has cleared out
  46   vsetcfg 32,0
  47   li a3,4
  48   vsetvl a3,a3
  49
  50   la a3,src1
  51   la a4,src2
  52   vld vx2,a3
  53   vld vx3,a4
  54   lui a0,%hi(vtcode2)
  55   vf %lo(vtcode2)(a0)
  56   la a5,dest
  57   vsd vx2,a5
  58   fence
  59
  60   ld a1,0(a5)
  61   li a2,5
  62   li TESTNUM,2
  63   bne a1,a2,fail
  64   ld a1,8(a5)
  65   li TESTNUM,3
  66   bne a1,a2,fail
  67   ld a1,16(a5)
  68   li TESTNUM,4
  69   bne a1,a2,fail
  70   ld a1,24(a5)
  71   li TESTNUM,5
  72   bne a1,a2,fail
  73
  74   TEST_PASSFAIL
  75
  76 RVTEST_CODE_END
  77
  78   .data
  79 RVTEST_DATA_BEGIN
  80
  81   TEST_DATA
  82
  83 src1:
  84   .dword 1
  85   .dword 2
  86   .dword 3
  87   .dword 4
  88 src2:
  89   .dword 4
  90   .dword 3
  91   .dword 2
  92   .dword 1
  93 dest:
  94   .dword 0xdeadbeefcafebabe
  95   .dword 0xdeadbeefcafebabe
  96   .dword 0xdeadbeefcafebabe
  97   .dword 0xdeadbeefcafebabe
  98
  99 RVTEST_DATA_END