11d02292e0132a05cb66de549b0584d87c3e8301
[riscv-tests.git] / isa / rv64uc / sv_c_swsp.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # rvc.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test RVC corner cases.
8 #
9
10 #include "riscv_test.h"
11 #include "sv_test_macros.h"
12
13 RVTEST_RV64U
14 RVTEST_CODE_BEGIN
15
16 .align 2
17 .option push
18 .option norvc
19
20 li a2, 1000;
21 li a3, 1001;
22
23 SET_SV_MVL(2)
24 SET_SV_2CSRS( SV_REG_CSR(1, 12, 0, 12, 1, 0),
25 SV_REG_CSR(1, 2, 0, 2, 1, 0) )
26 SET_SV_VL(2)
27
28 mv a1, sp
29 la sp, data;
30
31 .option push;
32 .option rvc;
33 .align 2;
34 c.swsp a2, 0(sp);
35 #lw a2, 0(sp);
36 .option pop
37
38
39 SET_SV_VL(0)
40 CLR_SV_CSRS()
41 SET_SV_MVL(0)
42
43 mv sp, a1
44
45 li a2, 0;
46 li a3, 0;
47
48 la a2, data;
49 lw a4, 0(a2);
50 lw a5, 4(a2);
51
52 TEST_SV_IMM(a4, 1000)
53 TEST_SV_IMM(a5, 1001)
54
55 .option pop
56
57 RVTEST_PASS # Signal success.
58 fail:
59 RVTEST_FAIL
60
61 RVTEST_CODE_END # End of test code.
62
63 .data
64 data:
65 .word 0;
66 .word 0;
67
68 RVTEST_DATA_BEGIN
69
70 RVTEST_DATA_END