redirect c_lwsp / c_swsp to x28
[riscv-tests.git] / isa / rv64uc / sv_c_swsp.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # rvc.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test RVC corner cases.
8 #
9
10 #include "riscv_test.h"
11 #include "sv_test_macros.h"
12
13 RVTEST_RV64U
14 RVTEST_CODE_BEGIN
15
16 .align 2
17 .option push
18 .option norvc
19
20 li a2, 1000;
21 li a3, 1001;
22 li a4, 1004;
23
24 SET_SV_MVL(3)
25 SET_SV_2CSRS( SV_REG_CSR(1, 12, 0, 12, 1),
26 SV_REG_CSR(1, 2, 0, 28, 1) )
27 SET_SV_VL(3)
28
29 # CSR redirects SP (x2) to x28
30 la x28, data;
31
32 .option push;
33 .option rvc;
34 .align 2;
35 c.swsp a2, 0(sp); # not SP, actually x28!
36 .option pop
37
38
39 SET_SV_VL(1)
40 CLR_SV_CSRS()
41 SET_SV_MVL(1)
42
43 la a2, data;
44 lw a4, 0(a2);
45 lw a5, 4(a2);
46 lw a6, 8(a2);
47
48 TEST_SV_IMM(a4, 1000)
49 TEST_SV_IMM(a5, 1001)
50 TEST_SV_IMM(a6, 1004)
51
52 .option pop
53
54 .align 2
55 .option push
56 .option norvc
57
58 li a2, 1000;
59 li a3, 1001;
60 li a4, 1004;
61
62 SET_SV_MVL(3)
63 SET_SV_2CSRS( SV_REG_CSR(1, 12, 0, 12, 1),
64 SV_REG_CSR(1, 2, 0, 2, 1) )
65 SET_SV_VL(3)
66
67 mv a1, sp
68 la sp, data;
69
70 .option push;
71 .option rvc;
72 .align 2;
73 c.swsp a2, 0(sp);
74 #lw a2, 0(sp);
75 .option pop
76
77
78 SET_SV_VL(1)
79 CLR_SV_CSRS()
80 SET_SV_MVL(1)
81
82 mv sp, a1
83
84 la a2, data;
85 lw a4, 0(a2);
86 lw a5, 4(a2);
87 lw a6, 8(a2);
88
89 TEST_SV_IMM(a4, 1000)
90 TEST_SV_IMM(a5, 1001)
91 TEST_SV_IMM(a6, 1004)
92
93 .option pop
94
95 RVTEST_PASS # Signal success.
96 fail:
97 RVTEST_FAIL
98
99 RVTEST_CODE_END # End of test code.
100
101 .data
102 data:
103 .word 0;
104 .word 0;
105 .word 0;
106
107 RVTEST_DATA_BEGIN
108
109 RVTEST_DATA_END