Rv32ud tests (#108)
[riscv-tests.git] / isa / rv64ud / fcvt.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # fcvt.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test fcvt.d.{wu|w|lu|l}, fcvt.s.d, and fcvt.d.s instructions.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64UF
14 RVTEST_CODE_BEGIN
15
16 #if __riscv_xlen == 32
17 # Replace the function with the 32-bit variant defined in test_macros.h
18 #undef TEST_INT_FP_OP_D
19 #define TEST_INT_FP_OP_D TEST_INT_FP_OP_D32
20
21 #undef TEST_FCVT_S_D
22 #define TEST_FCVT_S_D TEST_FCVT_S_D32
23 #endif
24
25 #-------------------------------------------------------------
26 # Arithmetic tests
27 #-------------------------------------------------------------
28
29 TEST_INT_FP_OP_D(2, fcvt.d.w, 2.0, 2);
30 TEST_INT_FP_OP_D(3, fcvt.d.w, -2.0, -2);
31
32 TEST_INT_FP_OP_D(4, fcvt.d.wu, 2.0, 2);
33 TEST_INT_FP_OP_D(5, fcvt.d.wu, 4294967294, -2);
34
35 #if __riscv_xlen >= 64
36 TEST_INT_FP_OP_D(6, fcvt.d.l, 2.0, 2);
37 TEST_INT_FP_OP_D(7, fcvt.d.l, -2.0, -2);
38
39 TEST_INT_FP_OP_D(8, fcvt.d.lu, 2.0, 2);
40 TEST_INT_FP_OP_D(9, fcvt.d.lu, 1.8446744073709552e19, -2);
41 #endif
42
43 TEST_FCVT_S_D(10, -1.5, -1.5)
44 TEST_FCVT_D_S(11, -1.5, -1.5)
45
46 #if __riscv_xlen >= 64
47 TEST_CASE(12, a0, 0x7ff8000000000000,
48 la a1, test_data_22;
49 ld a2, 0(a1);
50 fmv.d.x f2, a2;
51 fcvt.s.d f2, f2;
52 fcvt.d.s f2, f2;
53 fmv.x.d a0, f2;
54 )
55 #else
56 TEST_CASE_D32(12, a0, a1, 0x7ff8000000000000,
57 la a1, test_data_22;
58 fld f2, 0(a1);
59 fcvt.s.d f2, f2;
60 fcvt.d.s f2, f2;
61 fsd f2, 0(a1);
62 lw a0, 0(a1);
63 lw a1, 4(a1)
64 )
65 #endif
66
67 TEST_PASSFAIL
68
69 RVTEST_CODE_END
70
71 .data
72 RVTEST_DATA_BEGIN
73
74 TEST_DATA
75
76 test_data_22:
77 .dword 0x7ffcffffffff8004
78
79 RVTEST_DATA_END