16120659df4ac0a0d519dbbcfcd64e2c3e41dc0e
[riscv-tests.git] / isa / rv64uf / sv_fld_elwidth.S
1 #include "riscv_test.h"
2 #include "sv_test_macros.h"
3
4 RVTEST_RV64UF # Define TVM used by program.
5
6 #define SV_ELWIDTH_TEST( inst, vl, elwidth, wid1, wid2, \
7 testdata, ans ) \
8 \
9 la x12, testdata ; \
10 la x13, (testdata+elwidth); \
11 la x14, (testdata+elwidth*2); \
12 la x15, (testdata+elwidth*3); \
13 la x16, (testdata+elwidth*4); \
14 la x17, (testdata+elwidth*5); \
15 \
16 li x1, 0xa5a5a5a5a5a5a5a5; \
17 fmv.d.x f28, x1; \
18 fmv.d.x f29, x1; \
19 fmv.d.x f30, x1; \
20 \
21 SET_SV_MVL( vl); \
22 SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, 1), \
23 SV_REG_CSR( 0, 28, wid2, 28, 1)); \
24 SET_SV_VL( vl ); \
25 \
26 inst f28, 0(x12); \
27 \
28 CLR_SV_CSRS(); \
29 SET_SV_VL( 1); \
30 SET_SV_MVL( 1); \
31 \
32 TEST_SV_FW(0, f28, ans, 0); \
33 TEST_SV_FW(0, f29, ans, 8); \
34 TEST_SV_FW(0, f30, ans, 16);
35
36 # SV test: vector-vector add
37 #
38 # sets up x3 and x4 with data, sets VL to 2, and carries out
39 # an "add 1 to x3". which actually means "add 1 to x3 *AND* add 1 to x4"
40
41 # Test code region.
42 RVTEST_CODE_BEGIN # Start of test code.
43
44 SV_ELWIDTH_TEST( fld , 2, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer1 )
45 /*
46 SV_ELWIDTH_TEST( ld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1,
47 0x8979695949392919, 0x8777675747372717, 0x8676665646362616 )
48 SV_ELWIDTH_TEST( ld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata1,
49 0x0000000000002919, 0x0000000000004939, 0x0000000000006959 )
50 SV_ELWIDTH_TEST( ld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata1,
51 0x0000493900002919, 0xffff897900006959, 0xa5a5a5a500002717 )
52 SV_ELWIDTH_TEST( ld , 5, 8, SV_W_32BIT, SV_W_16BIT, testdata1,
53 0x6757271769592919, 0xa5a5a5a5a5a52616, 0xa5a5a5a5a5a5a5a5 )
54 SV_ELWIDTH_TEST( ld , 7, 8, SV_W_16BIT, SV_W_8BIT, testdata1,
55 0xa557371779593919, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
56 SV_ELWIDTH_TEST( ld , 11, 8, SV_W_8BIT, SV_W_16BIT, testdata1,
57 0x0049003900290019, 0xff89007900690059, 0xa5a5003700270017 )
58 */
59 RVTEST_PASS # Signal success.
60 fail:
61 RVTEST_FAIL
62 RVTEST_CODE_END # End of test code.
63
64 # Input data section.
65 # This section is optional, and this data is NOT saved in the output.
66 .data
67 .align 3
68 testdata1:
69 .dword 0x8979695949392919
70 .dword 0x8777675747372717
71 .dword 0x8676665646362616
72 .dword 0x8272625242322212
73 .dword 0x8171615141312111
74 .dword 0x8373635343332313
75
76 answer1:
77 .dword 0x8979695949392919
78 .dword 0x8777675747372717
79 .dword 0xa5a5a5a5a5a5a5a5
80
81 # Output data section.
82 RVTEST_DATA_BEGIN # Start of test output data region.
83 .align 3
84 result:
85 .dword -1
86 .dword -1
87 .dword -1
88 RVTEST_DATA_END # End of test output data region.
89