isa/rv64uf/sv_fld_elwidth.S

   1 #include "riscv_test.h"
   2 #include "sv_test_macros.h"
   3
   4 RVTEST_RV64UF        # Define TVM used by program.
   5
   6 #define SV_ELWIDTH_TESTW( inst, vl, elwidth, wid1, wid2, \
   7                          testdata, ans ) \
   8                                                         \
   9         la x12, testdata ;                              \
  10         la x13, (testdata+elwidth);                              \
  11         la x14, (testdata+elwidth*2);                              \
  12         la x15, (testdata+elwidth*3);                              \
  13         la x16, (testdata+elwidth*4);                              \
  14         la x17, (testdata+elwidth*5);                              \
  15                                                         \
  16         li x1, 0xa5a5a5a5a5a5a5a5;                                      \
  17         fmv.d.x f25, x1;                                   \
  18         fmv.d.x f26, x1;                                   \
  19         fmv.d.x f27, x1;                                   \
  20         fmv.d.x f28, x1;                                   \
  21         fmv.d.x f29, x1;                                   \
  22         fmv.d.x f30, x1;                                   \
  23                                                         \
  24         SET_SV_MVL( vl);                                  \
  25         SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, 1),        \
  26                       SV_REG_CSR( 0, 25, wid2, 25, 1));       \
  27         SET_SV_VL( vl );                                   \
  28                                                         \
  29         inst   f25, 0(x12);                              \
  30                                                         \
  31         CLR_SV_CSRS();                                  \
  32         SET_SV_VL( 1);                                   \
  33         SET_SV_MVL( 1);                                  \
  34                                                         \
  35         TEST_SV_FW(0, f25, ans, 0);                    \
  36         TEST_SV_FW(0, f26, ans, 4);                    \
  37         TEST_SV_FW(0, f27, ans, 8);
  38
  39 #define SV_ELWIDTH_TEST( inst, vl, elwidth, wid1, wid2, \
  40                          testdata, ans ) \
  41                                                         \
  42         la x12, testdata ;                              \
  43         la x13, (testdata+elwidth);                              \
  44         la x14, (testdata+elwidth*2);                              \
  45         la x15, (testdata+elwidth*3);                              \
  46         la x16, (testdata+elwidth*4);                              \
  47         la x17, (testdata+elwidth*5);                              \
  48                                                         \
  49         li x1, 0xa5a5a5a5a5a5a5a5;                                      \
  50         fmv.d.x f28, x1;                                   \
  51         fmv.d.x f29, x1;                                   \
  52         fmv.d.x f30, x1;                                   \
  53                                                         \
  54         SET_SV_MVL( vl);                                  \
  55         SET_SV_2CSRS( SV_REG_CSR( 1, 12, wid1, 12, 1),        \
  56                       SV_REG_CSR( 0, 28, wid2, 28, 1));       \
  57         SET_SV_VL( vl );                                   \
  58                                                         \
  59         inst   f28, 0(x12);                              \
  60                                                         \
  61         CLR_SV_CSRS();                                  \
  62         SET_SV_VL( 1);                                   \
  63         SET_SV_MVL( 1);                                  \
  64                                                         \
  65         TEST_SV_FD(0, f28, ans, 0);                    \
  66         TEST_SV_FD(0, f29, ans, 8);                    \
  67         TEST_SV_FD(0, f30, ans, 16);
  68
  69 # SV test: vector-vector add
  70 #
  71 # sets up x3 and x4 with data, sets VL to 2, and carries out
  72 # an "add 1 to x3".  which actually means "add 1 to x3 *AND* add 1 to x4"
  73
  74 # Test code region.
  75 RVTEST_CODE_BEGIN   # Start of test code.
  76
  77         SV_ELWIDTH_TEST( fld , 2, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer1 )
  78         SV_ELWIDTH_TEST( fld , 3, 8, SV_W_DFLT, SV_W_DFLT, testdata1, answer2 )
  79         SV_ELWIDTH_TEST( fld , 3, 8, SV_W_16BIT, SV_W_DFLT, testdata3, answer3)
  80         SV_ELWIDTH_TEST( fld , 5, 8, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
  81         SV_ELWIDTH_TEST( fld , 6, 8, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
  82
  83
  84         SV_ELWIDTH_TESTW(flw , 3, 4, SV_W_DFLT, SV_W_DFLT, testdata1, answer1 )
  85         SV_ELWIDTH_TESTW(flw , 3, 4, SV_W_16BIT, SV_W_DFLT, testdata3, answer8)
  86         SV_ELWIDTH_TESTW(flw , 4, 4, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
  87         SV_ELWIDTH_TESTW(flw , 6, 4, SV_W_16BIT, SV_W_32BIT, testdata3, answer4)
  88
  89         SV_ELWIDTH_TESTW(flw , 6, 4, SV_W_32BIT, SV_W_16BIT, testdata4, answer5)
  90         SV_ELWIDTH_TESTW(flw , 6, 4, SV_W_DFLT, SV_W_16BIT, testdata6, answer5)
  91
  92         RVTEST_PASS           # Signal success.
  93 fail:
  94         RVTEST_FAIL
  95 RVTEST_CODE_END     # End of test code.
  96
  97 # Input data section.
  98 # This section is optional, and this data is NOT saved in the output.
  99 .data
 100         .align 3
 101 testdata1:
 102         .dword 0x8979695949392919
 103         .dword 0x8777675747372717
 104         .dword 0x8676665646362616
 105         .dword 0x8272625242322212
 106         .dword 0x8171615141312111
 107         .dword 0x8373635343332313
 108
 109         .align 3
 110 answer1:
 111         .dword 0x8979695949392919
 112         .dword 0x8777675747372717
 113         .dword 0xa5a5a5a5a5a5a5a5
 114
 115         .align 3
 116 answer2:
 117
 118         .dword 0x8979695949392919
 119         .dword 0x8777675747372717
 120         .dword 0x8676665646362616
 121
 122         .align 3
 123 testdata3:
 124         .dword 0x63d03c0051805140
 125         .dword 0x000000000000E480
 126         .dword 0x8676665646362616
 127         .dword 0x8272625242322212
 128         .dword 0x8171615141312111
 129         .dword 0x8373635343332313
 130
 131         .align 3
 132 answer3:
 133
 134         .double 42.0
 135         .double 44.0
 136         .double 1.0
 137
 138         .align 3
 139 answer4:
 140
 141         .float 42.0
 142         .float 44.0
 143         .float 1.0
 144         .float 1000.0
 145         .float -1152.0
 146         .word 0xa5a5a5a5
 147
 148         .align 3
 149 testdata4:
 150
 151         .float 42.0
 152         .float 44.0
 153         .float 1.0
 154         .float 1000.0
 155         .float -1152.0
 156         .float -82.0
 157         .float 0x0
 158         .word 0xa5a5a5a5
 159
 160         .align 3
 161 answer5:
 162
 163         .short 0x5140 # 42 fp16
 164         .short 0x5180 # 44 fp16
 165         .short 0x3c00 # 1.0 fp16
 166         .short 0x63d0 # 1000.0 fp16
 167         .short 0xe480 # -1152.0 fp16
 168         .short 0xd520 # -82 fp16
 169         .short 0xa5a5
 170         .short 0xa5a5
 171         .dword 0xa5a5a5a5a5a5a5a5
 172
 173         .align 3
 174 testdata6:
 175
 176         .float 42.0
 177         .float 44.0
 178         .float 1.0
 179         .float 1000.0
 180         .float -1152.0
 181         .float -82.0
 182         .dword 0x0
 183         .dword 0x0
 184         .dword 0x0
 185         .dword 0x0
 186         .dword 0x0
 187         .dword 0x0
 188         .dword 0x0
 189
 190 answer7:
 191         .dword 0xa5a5a5a549392919
 192         .dword 0xa5a5a5a589796959
 193         .dword 0x8777675747372717
 194         .dword 0xa5a5a5a5a5a5a5a5
 195
 196         .align 3
 197
 198 answer8:
 199
 200         .float 42.0
 201         .float 44.0
 202         .float 1.0
 203
 204         .align 3
 205 # Output data section.
 206 RVTEST_DATA_BEGIN   # Start of test output data region.
 207         .align 3
 208 result:
 209         .dword -1
 210         .dword -1
 211         .dword -1
 212 RVTEST_DATA_END     # End of test output data region.
 213