Updating sv_add_elwidth to use SV_ELWIDTH_TEST macro from sv_test_macros
[riscv-tests.git] / isa / rv64ui / sv_add_elwidth.S
1 #include "riscv_test.h"
2 #include "sv_test_macros.h"
3
4 RVTEST_RV64U # Define TVM used by program.
5
6 # SV test: vector-vector add
7 #
8 # sets up x3 and x4 with data, sets VL to 2, and carries out
9 # an "add 1 to x3". which actually means "add 1 to x3 *AND* add 1 to x4"
10
11 # Test code region.
12 RVTEST_CODE_BEGIN # Start of test code.
13
14 #
15 SV_ELWIDTH_TEST( add, SV_LDD_DATA, testdata, 8, 0, 2, 0, 0, 0, 1, 1, 1,
16 0x000000ab8b6b4b2b, 0x000000a888684828, SV_W_DEFAULT_EXPECT)
17 SV_ELWIDTH_TEST( add, SV_LDD_DATA, testdata, 8, 0, 2, 0, 0, 3, 1, 1, 1,
18 0x886848288b6b4b2b, SV_W_DEFAULT_EXPECT, SV_W_DEFAULT_EXPECT)
19 SV_ELWIDTH_TEST( add, SV_LDD_DATA, testdata, 8, 0, 2, 1, 1, 0, 1, 1, 1,
20 0x000000000000002b, 0x000000000000004b, SV_W_DEFAULT_EXPECT)
21
22 RVTEST_PASS # Signal success.
23 fail:
24 RVTEST_FAIL
25 RVTEST_CODE_END # End of test code.
26
27 # Input data section.
28 # This section is optional, and this data is NOT saved in the output.
29 .data
30 .align 3
31 testdata:
32 .dword 0x0000005949392919
33 .dword 0x0000005747372717
34 .dword 0x0000000000000000
35 .dword 0x0000005242322212
36 .dword 0x0000005141312111
37 .dword 0x0000000000000000
38
39 # Output data section.
40 RVTEST_DATA_BEGIN # Start of test output data region.
41 .align 3
42 result:
43 .dword -1
44 .dword -1
45 .dword -1
46 RVTEST_DATA_END # End of test output data region.
47