isa/rv64ui/sv_addi.S

   1 #include "riscv_test.h"
   2 #include "sv_test_macros.h"
   3
   4 RVTEST_RV64U        # Define TVM used by program.
   5
   6
   7
   8 # Test code region.
   9 RVTEST_CODE_BEGIN   # Start of test code.
  10         csrrw   x0, 0x4f2, 2
  11         la      x1, testdata
  12         lw      x2, 0(x1)
  13         la      x1, (testdata+8)
  14         lw      x3, 0(x1)
  15         li      x1, SV_REG_CSR(1, 2, 0, 2, 1, 0)
  16         csrrw   x0, 0x4c0, x1
  17         csrrw   x0, 0x4f0, 2
  18         addi    x2, x2, 1         # Should be 42 into $2.
  19         csrrwi  x0, 0x4f2, 0
  20         csrrwi  x0, 0x4c0, 0
  21         csrrwi  x0, 0x4f0, 0
  22         li      x1, 42        # Desired result 1
  23         bne     x2, x1, fail  # Fail out if doesn't match.
  24         li      x1, 43        # Desired result 2
  25         bne     x3, x1, fail  # Fail out if doesn't match.
  26         RVTEST_PASS           # Signal success.
  27 fail:
  28         RVTEST_FAIL
  29 RVTEST_CODE_END     # End of test code.
  30
  31 # Input data section.
  32 # This section is optional, and this data is NOT saved in the output.
  33 .data
  34         .align 3
  35 testdata:
  36         .dword 41
  37         .dword 42
  38         .dword 43
  39
  40 # Output data section.
  41 RVTEST_DATA_BEGIN   # Start of test output data region.
  42         .align 3
  43 result:
  44         .dword -1
  45         .dword -1
  46         .dword -1
  47 RVTEST_DATA_END     # End of test output data region.
  48