32ec811c06f810d84dd20b4a608eed7aa83c30cd
[riscv-tests.git] / isa / rv64ui / sv_addw_elwidth.S
1 #include "riscv_test.h"
2 #include "sv_test_macros.h"
3
4 RVTEST_RV64U # Define TVM used by program.
5
6 // TODO: add extra "code" argument and "testdata" argument,
7 // replace "addw" with "code"
8 // TODO: move SV_ELWIDTH_TEST to sv_test_macros.h
9 // TODO: probably remove testing of x15 and x16 (or pass in as extra args?)
10
11 #define SV_ELWIDTH_TEST( vl, wid1, wid2, wid3, isvec1, isvec2, isvec3, \
12 expect1, expect2, expect3 ) \
13 \
14 SV_LDD_DATA( x12, testdata , 0); \
15 SV_LDD_DATA( x13, testdata+8 , 0); \
16 SV_LDD_DATA( x14, testdata+16, 0); \
17 SV_LDD_DATA( x15, testdata+24, 0); \
18 SV_LDD_DATA( x16, testdata+32, 0); \
19 SV_LDD_DATA( x17, testdata+40, 0); \
20 \
21 li x28, 0xa5a5a5a5a5a5a5a5; \
22 li x29, 0xa5a5a5a5a5a5a5a5; \
23 li x30, 0xa5a5a5a5a5a5a5a5; \
24 \
25 SET_SV_MVL( vl ); \
26 SET_SV_3CSRS( SV_REG_CSR( 1, 15, wid1, 15, isvec1), \
27 SV_REG_CSR( 1, 12, wid2, 12, isvec2), \
28 SV_REG_CSR( 1, 28, wid3, 28, isvec3)); \
29 SET_SV_VL( vl ); \
30 \
31 addw x28, x15, x12; \
32 \
33 CLR_SV_CSRS(); \
34 SET_SV_VL( 1); \
35 SET_SV_MVL( 1); \
36 \
37 TEST_SV_IMM( x28, expect1 ); \
38 TEST_SV_IMM( x29, expect2 ); \
39 TEST_SV_IMM( x30, expect3 ); \
40 TEST_SV_IMM( x15, 0x0000005242322212); \
41 TEST_SV_IMM( x16, 0x0000005141312111);
42
43
44 # SV test: vector-vector add
45 #
46 # sets up x3 and x4 with data, sets VL to 2, and carries out
47 # an "add 1 to x3". which actually means "add 1 to x3 *AND* add 1 to x4"
48
49 # Test code region.
50 RVTEST_CODE_BEGIN # Start of test code.
51
52 # TODO: add "addw" argument, add testdata argument
53 SV_ELWIDTH_TEST( 3, 0, 0, 0, 1, 1, 1,
54 0xffffffff8b6bab8b, 0xffffffff88684828, 0x0000000000000000 )
55 SV_ELWIDTH_TEST( 3, 0, 0, 3, 1, 1, 1,
56 0x886848288b6bab8b, 0xa5a5a5a500000000, 0xa5a5a5a5a5a5a5a5 )
57 SV_ELWIDTH_TEST( 3, 1, 1, 0, 1, 1, 1,
58 0xffffffffffffff8b, 0xffffffffffffffab, 0x000000000000006b )
59 SV_ELWIDTH_TEST( 3, 1, 1, 3, 1, 1, 1,
60 0xffffffabffffff8b, 0xa5a5a5a50000006b, 0xa5a5a5a5a5a5a5a5 )
61 SV_ELWIDTH_TEST( 3, 1, 1, 2, 1, 1, 1,
62 0xa5a5006bffabff8b, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
63 SV_ELWIDTH_TEST( 3, 1, 1, 1, 1, 1, 1,
64 0xa5a5a5a5a56bab8b, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 )
65
66 RVTEST_PASS # Signal success.
67 fail:
68 RVTEST_FAIL
69 RVTEST_CODE_END # End of test code.
70
71 # Input data section.
72 # This section is optional, and this data is NOT saved in the output.
73 .data
74 .align 3
75 testdata:
76 .dword 0x0000005949398979
77 .dword 0x0000005747372717
78 .dword 0x0000000000000000
79 .dword 0x0000005242322212
80 .dword 0x0000005141312111
81 .dword 0x0000000000000000
82
83 # Output data section.
84 RVTEST_DATA_BEGIN # Start of test output data region.
85 .align 3
86 result:
87 .dword -1
88 .dword -1
89 .dword -1
90 RVTEST_DATA_END # End of test output data region.
91