isa/rv64ui/sv_ld_elwidth.S

   1 #include "riscv_test.h"
   2 #include "sv_test_macros.h"
   3
   4 RVTEST_RV64U        # Define TVM used by program.
   5
   6
   7
   8
   9 # SV test: vector-vector add
  10 #
  11 # sets up x3 and x4 with data, sets VL to 2, and carries out
  12 # an "add 1 to x3".  which actually means "add 1 to x3 *AND* add 1 to x4"
  13
  14 # Test code region.
  15 RVTEST_CODE_BEGIN   # Start of test code.
  16
  17         SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
  18                 2, SV_W_DFLT, SV_W_DFLT, SV_W_DFLT, 1, 1, 1,
  19                 0x8979695949392919, 0x8777675747372717, 0xa5a5a5a5a5a5a5a5)
  20         SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
  21                 3, SV_W_DFLT, SV_W_DFLT, SV_W_DFLT, 1, 1, 1,
  22                 0x8979695949392919, 0x8777675747372717, 0x8676665646362616)
  23         SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
  24                 3, SV_W_16BIT, SV_W_16BIT, SV_W_DFLT, 1, 1, 1,
  25                 0x0000000000002919, 0x0000000000004939, 0x0000000000006959)
  26         SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
  27                 5, SV_W_16BIT, SV_W_16BIT, SV_W_32BIT, 1, 1, 1,
  28                 0x0000493900002919, 0xffff897900006959, 0xa5a5a5a500002717)
  29         SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
  30                 5, SV_W_32BIT, SV_W_32BIT, SV_W_16BIT, 1, 1, 1,
  31                 0x6757271769592919, 0xa5a5a5a5a5a52616, 0xa5a5a5a5a5a5a5a5)
  32         SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
  33                 7, SV_W_16BIT, SV_W_16BIT, SV_W_8BIT, 1, 1, 1,
  34                 0xa557371779593919, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5)
  35         SV_ELWIDTH_TEST_LOAD(ld, la, testdata, 8,
  36                 11, SV_W_8BIT, SV_W_8BIT, SV_W_16BIT, 1, 1, 1,
  37                 0x0049003900290019, 0xff89007900690059, 0xa5a5003700270017)
  38
  39         RVTEST_PASS           # Signal success.
  40 fail:
  41         RVTEST_FAIL
  42 RVTEST_CODE_END     # End of test code.
  43
  44 # Input data section.
  45 # This section is optional, and this data is NOT saved in the output.
  46 .data
  47         .align 3
  48 testdata:
  49         .dword 0x8979695949392919
  50         .dword 0x8777675747372717
  51         .dword 0x8676665646362616
  52         .dword 0x8272625242322212
  53         .dword 0x8171615141312111
  54         .dword 0x8373635343332313
  55
  56 # Output data section.
  57 RVTEST_DATA_BEGIN   # Start of test output data region.
  58         .align 3
  59 result:
  60         .dword -1
  61         .dword -1
  62         .dword -1
  63 RVTEST_DATA_END     # End of test output data region.
  64