564bf194408d910bc3781b5ddf757a43c9cb137a
[riscv-tests.git] / isa / rv64uv / utidx.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # utidx.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test utidx instruction in a vf block.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64UV
14 RVTEST_CODE_BEGIN
15
16 vsetcfg 2,0
17 li a2,2048
18 vsetvl a2,a2
19
20 lui a0,%hi(vtcode)
21 vf %lo(vtcode)(a0)
22 la a4,dest
23 vsd vx1,a4
24 fence
25
26 li a1,1
27 loop:
28 ld a0,0(a4)
29 addi TESTNUM,a1,2
30 bne a0,a1,fail
31 addi a4,a4,8
32 addi a1,a1,1
33 bne a1,a2,loop
34 j pass
35
36 vtcode:
37 utidx x1
38 addi x1,x1,1
39 stop
40
41 TEST_PASSFAIL
42
43 RVTEST_CODE_END
44
45 .data
46 RVTEST_DATA_BEGIN
47
48 TEST_DATA
49
50 dest:
51 .skip 16384
52
53 RVTEST_DATA_END