add rv64ud sv fadd test, shows flaw in loop for 3-arg operands
[riscv-tests.git] / isa / macros / simplev / sv_test_macros.h
2018-10-02 Luke Kenneth Casso... add rv64ud sv fadd test, shows flaw in loop for 3-arg...
2018-10-01 Luke Kenneth Casso... add vector-vector sv add
2018-10-01 Luke Kenneth Casso... add sv addi predicated unit test, including inversion...
2018-10-01 Luke Kenneth Casso... augment sv_addi test using macros
2018-10-01 Luke Kenneth Casso... add first unit test for simple-v