e2f279eeacc6da9892fe81a99f6dbcd154b8c76a
[sifive-blocks.git] / src / main / scala / devices / gpio / GPIOPins.scala
1 // See LICENSE for license details.
2 package sifive.blocks.devices.gpio
3
4 import Chisel._
5 import sifive.blocks.devices.pinctrl.{Pin}
6
7 // While this is a bit pendantic, it keeps the GPIO
8 // device more similar to the other devices. It's not 'special'
9 // even though it looks like something that more directly talks to
10 // a pin. It also makes it possible to change the exact
11 // type of pad this connects to.
12 class GPIOSignals[T <: Data] (pingen: ()=> T, c: GPIOParams) extends Bundle {
13 val pins = Vec(c.width, pingen())
14 }
15
16 class GPIOPins[T <: Pin] (pingen: ()=> T, c: GPIOParams) extends GPIOSignals[T](pingen, c)
17
18 object GPIOPinsFromPort {
19
20 def apply[T <: Pin](pins: GPIOSignals[T], port: GPIOPortIO){
21
22 // This will just match up the components of the Bundle that
23 // exist in both.
24 (pins.pins zip port.pins) foreach {case (pin, port) =>
25 pin <> port
26 }
27 }
28 }