src/main/scala/devices/gpio/JTAG.scala

   1 // See LICENSE for license details.
   2 package sifive.blocks.devices.gpio
   3
   4 import Chisel._
   5
   6 // ------------------------------------------------------------
   7 // SPI, UART, etc are with their
   8 // respective packages,
   9 // This file is for those that don't seem to have a good place
  10 // to put them otherwise.
  11 // ------------------------------------------------------------
  12
  13 import freechips.rocketchip.config._
  14 import freechips.rocketchip.jtag.{JTAGIO}
  15 import sifive.blocks.devices.pinctrl.{Pin, PinCtrl}
  16
  17 class JTAGPins[T <: Pin](pingen: () => T, hasTRSTn: Boolean = true) extends Bundle {
  18
  19   val TCK         = pingen()
  20   val TMS         = pingen()
  21   val TDI         = pingen()
  22   val TDO        = pingen()
  23   val TRSTn = if (hasTRSTn) Option(pingen()) else None
  24
  25   def fromJTAGPort(jtag: JTAGIO): Unit = {
  26     jtag.TCK  := TCK.inputPin (pue = Bool(true)).asClock
  27     jtag.TMS  := TMS.inputPin (pue = Bool(true))
  28     jtag.TDI  := TDI.inputPin(pue = Bool(true))
  29     jtag.TRSTn.foreach{t => t := TRSTn.get.inputPin(pue = Bool(true))}
  30
  31     TDO.outputPin(jtag.TDO.data)
  32     TDO.o.oe := jtag.TDO.driven
  33   }
  34 }