Merge remote-tracking branch 'origin/master' into i2c
[sifive-blocks.git] / src / main / scala / devices / i2c / I2CPeriphery.scala
1 // See LICENSE for license details.
2 package sifive.blocks.devices.i2c
3
4 import Chisel._
5 import diplomacy.LazyModule
6 import rocketchip.{TopNetwork,TopNetworkModule}
7 import uncore.tilelink2.TLFragmenter
8
9 trait PeripheryI2C {
10 this: TopNetwork { val i2cConfigs: Seq[I2CConfig] } =>
11 val i2c = i2cConfigs.zipWithIndex.map { case (c, i) =>
12 val i2c = LazyModule(new TLI2C(c))
13 i2c.node := TLFragmenter(peripheryBusConfig.beatBytes, cacheBlockBytes)(peripheryBus.node)
14 intBus.intnode := i2c.intnode
15 i2c
16 }
17 }
18
19 trait PeripheryI2CBundle {
20 this: { val i2cConfigs: Seq[I2CConfig] } =>
21 val i2cs = Vec(i2cConfigs.size, new I2CPort)
22 }
23
24 trait PeripheryI2CModule {
25 this: TopNetworkModule {
26 val i2cConfigs: Seq[I2CConfig]
27 val outer: PeripheryI2C
28 val io: PeripheryI2CBundle
29 } =>
30 (io.i2cs zip outer.i2c).foreach { case (io, device) =>
31 io <> device.module.io.port
32 }
33 }