Merge pull request #1 from sifive/i2c
[sifive-blocks.git] / src / main / scala / devices / i2c / I2CPins.scala
1 // See LICENSE for license details.
2 package sifive.blocks.devices.i2c
3
4 import Chisel._
5 import sifive.blocks.devices.gpio.{GPIOPin, GPIOOutputPinCtrl}
6 import sifive.blocks.util.ShiftRegisterInit
7
8
9 class I2CPinsIO extends Bundle {
10 val scl = new GPIOPin
11 val sda = new GPIOPin
12 }
13
14 class I2CGPIOPort(syncStages: Int = 0) extends Module {
15 val io = new Bundle{
16 val i2c = new I2CPort().flip()
17 val pins = new I2CPinsIO
18 }
19
20 GPIOOutputPinCtrl(io.pins.scl, io.i2c.scl.out, pue=true.B, ie = true.B)
21 io.pins.scl.o.oe := io.i2c.scl.oe
22 io.i2c.scl.in := ShiftRegisterInit(io.pins.scl.i.ival, syncStages, Bool(true))
23
24 GPIOOutputPinCtrl(io.pins.sda, io.i2c.sda.out, pue=true.B, ie = true.B)
25 io.pins.sda.o.oe := io.i2c.sda.oe
26 io.i2c.sda.in := ShiftRegisterInit(io.pins.sda.i.ival, syncStages, Bool(true))
27 }