spi: SPIParamsBase param needs to be public
[sifive-blocks.git] / src / main / scala / devices / pwm / PWMPins.scala
1 // See LICENSE for license details.
2 package sifive.blocks.devices.pwm
3
4 import Chisel._
5 import sifive.blocks.devices.pinctrl.{Pin}
6
7 class PWMSignals[T <: Data](private val pingen: () => T, val c: PWMParams) extends Bundle {
8 val pwm: Vec[T] = Vec(c.ncmp, pingen())
9 }
10
11 class PWMPins[T <: Pin](pingen: () => T, c: PWMParams) extends PWMSignals[T](pingen, c)
12
13 object PWMPinsFromPort {
14 def apply[T <: Pin] (pins: PWMSignals[T], port: PWMPortIO): Unit = {
15 (pins.pwm zip port.port) foreach {case (pin, port) =>
16 pin.outputPin(port)
17 }
18 }
19 }