src/main/scala/devices/spi/SPIPeriphery.scala

   1 // See LICENSE for license details.
   2 package sifive.blocks.devices.spi
   3
   4 import Chisel._
   5 import freechips.rocketchip.config.Field
   6 import freechips.rocketchip.diplomacy.{LazyModule,LazyMultiIOModuleImp}
   7 import freechips.rocketchip.chip.HasSystemNetworks
   8 import freechips.rocketchip.tilelink.{TLFragmenter,TLWidthWidget}
   9 import freechips.rocketchip.util.HeterogeneousBag
  10
  11 case object PeripherySPIKey extends Field[Seq[SPIParams]]
  12
  13 trait HasPeripherySPI extends HasSystemNetworks {
  14   val spiParams = p(PeripherySPIKey)
  15   val spis = spiParams map { params =>
  16     val spi = LazyModule(new TLSPI(peripheryBusBytes, params))
  17     spi.rnode := TLFragmenter(peripheryBusBytes, cacheBlockBytes)(peripheryBus.node)
  18     intBus.intnode := spi.intnode
  19     spi
  20   }
  21 }
  22
  23 trait HasPeripherySPIBundle {
  24   val spi: HeterogeneousBag[SPIPortIO]
  25
  26 }
  27
  28 trait HasPeripherySPIModuleImp extends LazyMultiIOModuleImp with HasPeripherySPIBundle {
  29   val outer: HasPeripherySPI
  30   val spi = IO(HeterogeneousBag(outer.spiParams.map(new SPIPortIO(_))))
  31
  32   (spi zip outer.spis).foreach { case (io, device) =>
  33     io <> device.module.io.port
  34   }
  35 }
  36
  37 case object PeripherySPIFlashKey extends Field[Seq[SPIFlashParams]]
  38
  39 trait HasPeripherySPIFlash extends HasSystemNetworks {
  40   val spiFlashParams = p(PeripherySPIFlashKey)
  41   val qspis = spiFlashParams map { params =>
  42     val qspi = LazyModule(new TLSPIFlash(peripheryBusBytes, params))
  43     qspi.rnode := TLFragmenter(peripheryBusBytes, cacheBlockBytes)(peripheryBus.node)
  44     qspi.fnode := TLFragmenter(1, cacheBlockBytes)(TLWidthWidget(peripheryBusBytes)(peripheryBus.node))
  45     intBus.intnode := qspi.intnode
  46     qspi
  47   }
  48 }
  49
  50 trait HasPeripherySPIFlashBundle {
  51   val qspi: HeterogeneousBag[SPIPortIO]
  52
  53 }
  54
  55 trait HasPeripherySPIFlashModuleImp extends LazyMultiIOModuleImp with HasPeripherySPIFlashBundle {
  56   val outer: HasPeripherySPIFlash
  57   val qspi = IO(HeterogeneousBag(outer.spiFlashParams.map(new SPIPortIO(_))))
  58
  59   (qspi zip outer.qspis) foreach { case (io, device) =>
  60     io <> device.module.io.port
  61   }
  62 }
  63