Refactor package hierarchy. (#25)

[sifive-blocks.git] / src / main / scala / devices / i2c / I2C.scala

diff --git a/src/main/scala/devices/i2c/I2C.scala b/src/main/scala/devices/i2c/I2C.scala
index f0df22a6e48702d5f2e845962df229949390a078..58ad5482688f8f193e8f047ba4cd1d0202675444 100644 (file)
--- a/src/main/scala/devices/i2c/I2C.scala
+++ b/src/main/scala/devices/i2c/I2C.scala
@@ -42,10 +42,10 @@
 package sifive.blocks.devices.i2c
 
 import Chisel._
-import config._
-import regmapper._
-import uncore.tilelink2._
-import util.{AsyncResetRegVec, Majority}
+import freechips.rocketchip.config._
+import freechips.rocketchip.regmapper._
+import freechips.rocketchip.tilelink._
+import freechips.rocketchip.util.{AsyncResetRegVec, Majority}
 import sifive.blocks.devices.gpio.{GPIOPinCtrl}
 
 case class I2CParams(address: BigInt)