PMU: adapt to new chisel API (#45)

[sifive-blocks.git] / src / main / scala / devices / mockaon / PMU.scala

diff --git a/src/main/scala/devices/mockaon/PMU.scala b/src/main/scala/devices/mockaon/PMU.scala
index 2c7964a698baa7455e4c377e64313b5388a82b49..bd9d339c27ac4e6e5ff5808c60222a65cb5c0c19 100644 (file)
--- a/src/main/scala/devices/mockaon/PMU.scala
+++ b/src/main/scala/devices/mockaon/PMU.scala
@@ -3,7 +3,7 @@ package sifive.blocks.devices.mockaon
 
 import Chisel._
 import Chisel.ImplicitConversions._
-import util._
+import freechips.rocketchip.util._
 import sifive.blocks.util.SRLatch
 
 import sifive.blocks.util.{SlaveRegIF}
@@ -131,7 +131,9 @@ class PMU(val c: PMUConfig) extends Module {
     val resetCauses = new ResetCauses().asInput
   }
 
-  val core = Module(new PMUCore(c)(resetIn = Reg(next = Reg(next = reset))))
+  val coreReset = Reg(next = Reg(next = reset))
+  val core = Module(new PMUCore(c)(resetIn = coreReset))
+
   io <> core.io
   core.io.wakeup.reset := false // this is implied by resetting the PMU