- //if(bits(37)==1) { (upper address range)
- // axiaddress = least sig 37 bits of address
- //else{ (low address range)
- // axiaddress = address ^ 0x8000000
- //}
-
- val awaddr = axi_async.aw.bits.addr;
- val awbit31 = awaddr(37) & awaddr(31)
-
- val araddr = axi_async.ar.bits.addr;
- val arbit31 = araddr(37) & araddr(31)
+ val awaddr = axi_async.aw.bits.addr - UInt(offset)
+ val araddr = axi_async.ar.bits.addr - UInt(offset)