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shiftregs: Use SyncResetSynchronizerShiftReg primitives where appropriate
[sifive-blocks.git]
/
src
/
main
/
scala
/
devices
/
spi
/
SPIPhysical.scala
2017-09-06
Megan Wachs
shiftregs: Use SyncResetSynchronizerShiftReg primitives...
synchronizers
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2017-09-06
Megan Wachs
ShiftRegInit: use the rocket-chip version since it...
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2017-05-03
Henry Cook
Merge pull request #10 from sifive/axi-mmio
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2017-05-02
Yunsup Lee
Merge pull request #11 from sifive/spi
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2017-05-02
Albert Ou
spi: Fix io.port.dq(3) output enable
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2017-03-10
Megan Wachs
Merge remote-tracking branch 'origin/master' into debug...
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2017-03-03
Wesley W. Terpstra
Merge pull request #4 from sifive/periphery-keys
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2017-03-03
Wesley W. Terpstra
devices: create periphery keys for all devices
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2017-02-10
Alex Solomatnikov
Merge remote-tracking branch 'origin/master' into i2c
i2c
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2017-01-31
Wesley W. Terpstra
spi: work around ucb-bar/chisel3#472
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2016-11-29
SiFive
Initial commit.
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