shiftregs: Use SyncResetSynchronizerShiftReg primitives where appropriate synchronizers
[sifive-blocks.git] / src / main / scala / devices / i2c /
drwxr-xr-x   ..
-rw-r--r-- 18059 I2C.scala
-rw-r--r-- 529 I2CCtrlRegs.scala
-rw-r--r-- 929 I2CPeriphery.scala
-rw-r--r-- 1047 I2CPins.scala