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starting to run into things being broken in LD/ST Comp (yay)
[soc.git]
/
src
/
experiment
/
score6600.py
diff --git
a/src/experiment/score6600.py
b/src/experiment/score6600.py
index 5d67c05b998a820a38a4fe4e40b44f2093236b02..ccb26c1c516ad5b24391e440a954a8e0bb3c0c7b 100644
(file)
--- a/
src/experiment/score6600.py
+++ b/
src/experiment/score6600.py
@@
-202,7
+202,7
@@
class CompUnitsBase(Elaboratable):
class CompUnitLDSTs(CompUnitsBase):
class CompUnitLDSTs(CompUnitsBase):
- def __init__(self, rwid, opwid, mem):
+ def __init__(self, rwid, opwid,
n_ldsts,
mem):
""" Inputs:
* :rwid: bit width of register file(s) - both FP and INT
""" Inputs:
* :rwid: bit width of register file(s) - both FP and INT
@@
-215,11
+215,12
@@
class CompUnitLDSTs(CompUnitsBase):
self.imm_i = Signal(rwid, reset_less=True)
# Int ALUs
self.imm_i = Signal(rwid, reset_less=True)
# Int ALUs
- add1 = ALU(rwid)
- add2 = ALU(rwid)
+ alus = []
+ for i in range(n_ldsts):
+ alus.append(ALU(rwid))
units = []
units = []
- for alu in
[add1, add2]
:
+ for alu in
alus
:
aluopwid = 4 # see compldst.py for "internal" opcode
units.append(LDSTCompUnit(rwid, aluopwid, alu, mem))
aluopwid = 4 # see compldst.py for "internal" opcode
units.append(LDSTCompUnit(rwid, aluopwid, alu, mem))
@@
-402,8
+403,8
@@
class Scoreboard(Elaboratable):
# issue q needs to get at these
self.aluissue = IssueUnitGroup(2)
# issue q needs to get at these
self.aluissue = IssueUnitGroup(2)
+ self.lsissue = IssueUnitGroup(2)
self.brissue = IssueUnitGroup(1)
self.brissue = IssueUnitGroup(1)
- self.lsissue = IssueUnitGroup(1)
# and these
self.alu_oper_i = Signal(4, reset_less=True)
self.alu_imm_i = Signal(rwid, reset_less=True)
# and these
self.alu_oper_i = Signal(4, reset_less=True)
self.alu_imm_i = Signal(rwid, reset_less=True)
@@
-454,10
+455,10
@@
class Scoreboard(Elaboratable):
# LDST Comp Units
n_ldsts = 2
# LDST Comp Units
n_ldsts = 2
- cul = CompUnitLDSTs(self.rwid, 4, None)
+ cul = CompUnitLDSTs(self.rwid, 4,
self.lsissue.n_insns,
None)
# Comp Units
# Comp Units
- m.submodules.cu = cu = CompUnitsBase(self.rwid, [cua, cu
b, cul
])
+ m.submodules.cu = cu = CompUnitsBase(self.rwid, [cua, cu
l, cub
])
bgt = cub.bgt # get at the branch computation unit
br1 = cub.br1
bgt = cub.bgt # get at the branch computation unit
br1 = cub.br1
@@
-478,7
+479,7
@@
class Scoreboard(Elaboratable):
# INT/FP Issue Unit
regdecode = RegDecode(self.n_regs)
m.submodules.regdecode = regdecode
# INT/FP Issue Unit
regdecode = RegDecode(self.n_regs)
m.submodules.regdecode = regdecode
- issueunit = IssueUnitArray([self.aluissue, self.
brissue, self.ls
issue])
+ issueunit = IssueUnitArray([self.aluissue, self.
lsissue, self.br
issue])
m.submodules.issueunit = issueunit
# Shadow Matrix. currently n_intfus shadows, to be used for
m.submodules.issueunit = issueunit
# Shadow Matrix. currently n_intfus shadows, to be used for
@@
-1089,10
+1090,10
@@
def scoreboard_sim(dut, alusim):
# create some instructions (some random, some regression tests)
instrs = []
# create some instructions (some random, some regression tests)
instrs = []
- if
Tru
e:
+ if
Fals
e:
instrs = create_random_ops(dut, 15, True, 4)
instrs = create_random_ops(dut, 15, True, 4)
- if
Fals
e: # LD test (with immediate)
+ if
Tru
e: # LD test (with immediate)
instrs.append( (1, 2, 2, 0x10, 1, 20, (0, 0)) )
if False:
instrs.append( (1, 2, 2, 0x10, 1, 20, (0, 0)) )
if False: