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reduce icache/dcache TLB sizes
[soc.git]
/
src
/
soc
/
experiment
/
dcache.py
diff --git
a/src/soc/experiment/dcache.py
b/src/soc/experiment/dcache.py
index 82b983bd3fd0166235395a3a33d011049e4ab801..910149e50a5dcc73955592d37dc97f8ec4a58690 100644
(file)
--- a/
src/soc/experiment/dcache.py
+++ b/
src/soc/experiment/dcache.py
@@
-749,9
+749,9
@@
class DCache(Elaboratable, DCacheConfig):
(pspec.microwatt_compat == True))
XLEN = pspec.XLEN
- TLB_SET_SIZE =
16
+ TLB_SET_SIZE =
8
TLB_NUM_WAYS = 2
- NUM_LINES =
16
+ NUM_LINES =
8
NUM_WAYS = 2
if self.small_cache: