add bigendian mode to helloworld test

diff --git a/src/soc/config/endian.py b/src/soc/config/endian.py
index 0aaa61c25ea4c59f88cfe0ed7c8bfa9cab4cbee8..eb6e0c3f97be5b76b785d318e469c13e96190e9e 100644 (file)
--- a/src/soc/config/endian.py
+++ b/src/soc/config/endian.py
@@ -1,5 +1,5 @@
 global bigendian
-bigendian = 1
+bigendian = 0
 
 def set_endian_mode(mode):
     bigendian = mode

diff --git a/src/soc/simple/test/test_microwatt.py b/src/soc/simple/test/test_microwatt.py
index fc2e3f15baa31d7145390488487427569f1316f1..1abfa8eae903c2f6a1a882779dee09f3ed6a441f 100644 (file)
--- a/src/soc/simple/test/test_microwatt.py
+++ b/src/soc/simple/test/test_microwatt.py
@@ -8,6 +8,8 @@ from nmigen.back.pysim import Simulator, Delay, Settle
 from nmutil.formaltest import FHDLTestCase
 
 from soc.simple.issuer import TestIssuer
+from soc.config.endian import bigendian
+
 
 from soc.config.test.test_loadstore import TestMemPspec
 from soc.simple.test.test_core import (setup_regs, check_regs,
@@ -32,11 +34,11 @@ class BinaryTestCase(FHDLTestCase):
 
     @unittest.skip("a bit big")
     def test_binary(self):
-        with Program("1.bin") as program:
+        with Program("1.bin", bigendian) as program:
             self.run_tst_program(program)
 
     def test_binary(self):
-        with Program("hello_world.bin") as program:
+        with Program("hello_world.bin", bigendian) as program:
             self.run_tst_program(program)
 
     def run_tst_program(self, prog):