Add test_mfcr

diff --git a/src/soc/decoder/isa/test_caller.py b/src/soc/decoder/isa/test_caller.py
index 21364340e5395a27c2951a34d5ae63d8bb8964e8..78766f6c0d608556c6200ecfb5e76c71e55b9baf 100644 (file)
--- a/src/soc/decoder/isa/test_caller.py
+++ b/src/soc/decoder/isa/test_caller.py
@@ -128,8 +128,11 @@ class DecoderTestCase(FHDLTestCase):
             self.assertEqual(sim.gpr(1), SelectableInt(0x1234, 64))
             self.assertEqual(sim.gpr(2), SelectableInt(0, 64))
 
-
-
+    def test_mfcr(self):
+        lst = ["mfcr 1"]
+        with Program(lst) as program:
+            sim = self.run_tst_program(program)
+            self.assertEqual(sim.gpr(1), SelectableInt(0, 64))
 
     def test_mtcrf(self):
         for i in range(4):

diff --git a/src/soc/decoder/selectable_int.py b/src/soc/decoder/selectable_int.py
index 33cbb74e7ba8e371597596bb95bf85847b43a12e..1227335e45256aadd2021a9d0475fcbdf86e4ba7 100644 (file)
--- a/src/soc/decoder/selectable_int.py
+++ b/src/soc/decoder/selectable_int.py
@@ -342,6 +342,8 @@ def selectconcat(*args, repeat=1):
         args = tmp
     res = copy(args[0])
     for i in args[1:]:
+        if isinstance(i, FieldSelectableInt):
+            i = i.si
         assert isinstance(i, SelectableInt), "can only concat SIs, sorry"
         res.bits += i.bits
         res.value = (res.value << i.bits) | i.value