remove unneeded parameter

diff --git a/src/soc/experiment/icache.py b/src/soc/experiment/icache.py
index 58e33c25027dc0e36ceb3658575ed13edc202947..e594bf8acb641f7ff3811c3724b39533e796a149 100644 (file)
--- a/src/soc/experiment/icache.py
+++ b/src/soc/experiment/icache.py
@@ -669,7 +669,7 @@ class ICache(FetchUnitInterface, Elaboratable):
         sync += r.state.eq(State.WAIT_ACK)
 
     def icache_miss_wait_ack(self, m, r, replace_way, inval_in,
-                             cache_tags, cache_valids, stbs_done):
+                             cache_valids, stbs_done):
         comb = m.d.comb
         sync = m.d.sync
 
@@ -766,7 +766,7 @@ class ICache(FetchUnitInterface, Elaboratable):
                                              cache_tags, cache_valids)
 
                 self.icache_miss_wait_ack(m, r, replace_way, inval_in,
-                                          cache_tags, cache_valids, stbs_done)
+                                          cache_valids, stbs_done)
 
         # TLB miss and protection fault processing
         with m.If(flush_in | m_in.tlbld):