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diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py
index 507302f451a18e0a4f5252d4c8f088e58e05a420..d9c398b4143cddad422465a8bba422070d3510c4 100644 (file)
--- a/src/soc/simple/core.py
+++ b/src/soc/simple/core.py
@@ -159,6 +159,7 @@ class NonProductionCore(ControlBase):
             # urr store I-Cache in core so it is easier to get at
             self.icache = lsi.icache
 
+        # alternative reset values for STATE regs
         self.msr_at_reset = 0x0
         if hasattr(pspec, "msr_reset") and isinstance(pspec.msr_reset, int):
             self.msr_at_reset = pspec.msr_reset