subset columns for PowerDecoder - bit of a mess (done by hand)

diff --git a/src/soc/decoder/power_decoder.py b/src/soc/decoder/power_decoder.py
index 752e706c0ab50c679e6fa7768a9ced9f1568fbd7..e4a5b9d02aea7e101d786d2823f9faa17867abdb 100644 (file)
--- a/src/soc/decoder/power_decoder.py
+++ b/src/soc/decoder/power_decoder.py
@@ -163,17 +163,25 @@ class PowerOp:
 
     def __init__(self, incl_asm=True, name=None, subset=None):
         self.subset = subset
+        debug_report = set()
+        fields = set()
         for field, ptype in power_op_types.items():
+            fields.add(field)
             if subset and field not in subset:
                 continue
             fname = get_pname(field, name)
             setattr(self, field, Signal(ptype, reset_less=True, name=fname))
+            debug_report.add(field)
         for bit in single_bit_flags:
             field = get_signal_name(bit)
+            fields.add(field)
             if subset and field not in subset:
                 continue
+            debug_report.add(field)
             fname = get_pname(field, name)
             setattr(self, field, Signal(reset_less=True, name=fname))
+        print ("PowerOp debug", name, debug_report)
+        print ("        fields", fields)
 
     def _eq(self, row=None):
         if row is None:

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index 45918668ba8b5f318cb7e5b2c8606e05f670ed17..5df3f16c7c4d82e83cacea65b17d86b47814e046 100644 (file)
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -592,31 +592,61 @@ class DecodeCROut(Elaboratable):
 
         return m
 
+# dictionary of Input Record field names that, if they exist,
+# will need a corresponding CSV Decoder file column (actually, PowerOp)
+# to be decoded (this includes the single bit names)
+record_names = {'insn_type': 'internal_op',
+                'fn_unit': 'function_unit',
+                'rc': 'rc_sel',
+                'oe': 'rc_sel',
+                'zero_a': 'in1_sel',
+                'imm_data': 'in2_sel',
+                'invert_in': 'inv_a',
+                'invert_out': 'inv_out',
+                'rc': 'cr_out',
+                'oe': 'cr_in',
+                'output_carry': 'cry_out',
+                'input_carry': 'cry_in',
+                'is_32bit': 'is_32b',
+                'is_signed': 'sgn',
+                'lk': 'lk',
+                'data_len': 'ldst_len',
+                'byte_reverse': 'br',
+                'sign_extend': 'sgn_ext',
+                'ldst_mode': 'upd',
+                }
 
 class PowerDecodeSubset(Elaboratable):
     """PowerDecodeSubset: dynamic subset decoder
 
     """
 
-    def __init__(self, dec, opkls=None, fn_name=None, col_subset=None,
+    def __init__(self, dec, opkls=None, fn_name=None,
                             final=False, state=None):
 
         self.final = final
         self.opkls = opkls
+        self.fn_name = fn_name
+        self.e = Decode2ToExecute1Type(name=self.fn_name, opkls=self.opkls)
+        col_subset = self.get_col_subset(self.e.do)
+
         if dec is None:
-            self.fn_name = fn_name
-            self.dec = create_pdecode(name=fn_name, col_subset=col_subset,
+            dec = create_pdecode(name=fn_name, col_subset=col_subset,
                                       row_subset=self.rowsubsetfn)
-        else:
-            self.dec = dec
-            self.fn_name = None
-        self.e = Decode2ToExecute1Type(name=self.fn_name, opkls=self.opkls)
+        self.dec = dec
 
         # state information needed by the Decoder
-        if state is not None:
-            self.state = state
-        else:
-            self.state = CoreState("dec2")
+        if state is None:
+            state = CoreState("dec2")
+        self.state = state
+
+    def get_col_subset(self, do):
+        subset = {'cr_in', 'cr_out', 'rc_sel'} # needed, non-optional
+        for k, v in record_names.items():
+            if hasattr(do, k):
+                subset.add(v)
+        print ("get_col_subset", self.fn_name, do.fields, subset)
+        return subset
 
     def rowsubsetfn(self, opcode, row):
         return row['unit'] == self.fn_name
@@ -753,6 +783,17 @@ class PowerDecode2(PowerDecodeSubset):
     a suitable alternative (trap).
     """
 
+    def get_col_subset(self, opkls):
+        subset = super().get_col_subset(opkls)
+        subset.add("in1_sel")
+        subset.add("in2_sel")
+        subset.add("in3_sel")
+        subset.add("out_sel")
+        subset.add("lk")
+        subset.add("internal_op")
+        subset.add("form")
+        return subset
+
     def elaborate(self, platform):
         m = super().elaborate(platform)
         comb = m.d.comb

diff --git a/src/soc/litex/florent/sim.py b/src/soc/litex/florent/sim.py
index f83e4b8ce7f306d4f7f318b157a5a9d3eab758e9..96c214aedb04b19f5d7ae8500a3c8d9fa7099373 100755 (executable)
--- a/src/soc/litex/florent/sim.py
+++ b/src/soc/litex/florent/sim.py
@@ -53,14 +53,14 @@ class LibreSoCSim(SoCSDRAM):
 
         #ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
         #            "hello_world/hello_world.bin"
-        #ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
-        #            "tests/1.bin"
+        ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
+                    "tests/1.bin"
         #ram_fname = "/tmp/test.bin"
         #ram_fname = None
         #ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
         #            "micropython/firmware.bin"
-        ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
-                    "tests/xics/xics.bin"
+        #ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
+        #            "tests/xics/xics.bin"
         #ram_fname = "/home/lkcl/src/libresoc/microwatt/" \
         #            "tests/decrementer/decrementer.bin"
         #ram_fname = "/home/lkcl/src/libresoc/microwatt/" \