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Add tests for subfic and neg
author
Michael Nolan
<mtnolan2640@gmail.com>
Thu, 26 Mar 2020 14:55:24 +0000
(10:55 -0400)
committer
Michael Nolan
<mtnolan2640@gmail.com>
Thu, 26 Mar 2020 14:55:24 +0000
(10:55 -0400)
src/soc/simulator/test_sim.py
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diff --git
a/src/soc/simulator/test_sim.py
b/src/soc/simulator/test_sim.py
index 95e0d291f0f165c7c4d445ce8d948c5674fd6478..aadaf667eff7317b1aa514993cd82b9abedf1047 100644
(file)
--- a/
src/soc/simulator/test_sim.py
+++ b/
src/soc/simulator/test_sim.py
@@
-91,9
+91,11
@@
class DecoderTestCase(FHDLTestCase):
def test_sub(self):
lst = ["addi 1, 0, 0x1234",
"addi 2, 0, 0x5678",
- "subf 1, 1, 2"]
+ "subf 3, 1, 2",
+ "subfic 4, 1, 0x1337",
+ "neg 5, 1"]
with Program(lst) as program:
- self.run_test_program(program, [1, 2])
+ self.run_test_program(program, [1, 2
, 3, 4, 5
])
def run_test_program(self, prog, reglist):
simulator = InternalOpSimulator()