whoops sort out name of SPBlock RAM

diff --git a/src/soc/bus/SPBlock512W64B8W.py b/src/soc/bus/SPBlock512W64B8W.py
index 9b25f10491486e30b8e635139cb17ce32fad9cd5..994f962647e23f5726a3001b9e6b1da1da1f47dd 100644 (file)
--- a/src/soc/bus/SPBlock512W64B8W.py
+++ b/src/soc/bus/SPBlock512W64B8W.py
@@ -52,7 +52,7 @@ class SPBlock512W64B8W(Elaboratable):
         sram = Instance("spblock_512w64b8w", i_a=a, o_q=q,
                                                      i_d=d, i_we=we,
                                                      i_clk=ClockSignal())
-        m.submodules['spblock_512w64b8w_%s'] = sram
+        m.submodules['spblock_512w64b8w_%d' % self.idx] = sram
         # has to be added to the actual module rather than the instance
         # sram.attrs['blackbox'] = 1