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reduce TLB set size from 64 to 16 to get FPGA resource utilisation down
[soc.git]
/
.pylintrc
2020-07-17
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-07-17
Jacob Lifshay
add .pylintrc
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projects / soc.git / history