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correct clock name for H-Tree in ls180
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Jun 2021 12:19:02 +0000 (12:19 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Jun 2021 12:19:02 +0000 (12:19 +0000)
use por_clk not core.por_clk
this is the output from the PLL

experiments9/doDesign.py patch | blob | history

diff --git a/experiments9/doDesign.py b/experiments9/doDesign.py
index fd61b7ab7ca8432c8c26bda6723f38423d258fdd..0eba1cf492ae6809ac238a3e9cd36d339cf6b3b7 100644 (file)
--- a/experiments9/doDesign.py
+++ b/experiments9/doDesign.py
@@ -58,7 +58,7 @@ def scriptMain (**kw):
         ls180Conf.chipConf.ioPadGauge = 'niolib'
         ls180Conf.coreSize = (l(coreSize     ), l(coreSize     ))
         ls180Conf.chipSize = (l(coreSize+3360), l(coreSize+3360))
-        ls180Conf.useHTree('core.por_clk')
+        ls180Conf.useHTree('por_clk') # output from the PLL, needs to be H-Tree
         ls180Conf.useHTree('jtag_tck_from_pad')
 
         ls180ToChip = CoreToChip( ls180Conf )